On Wed, Jan 27, 2010 at 10:05, Eric Blossom <e...@comsec.com> wrote: > See comment above about there currently being only a single DDC in the > FPGA. If you want two channels, amongst other things, you'll need to > instantiate two DDCs, and add code that interleaves the samples from > the two DDCs. You'll also have to create host and firmware that can > select the 1 or 2 channel case.
There is a custom USRP2 top-level FPGA build that creates two synchronous DDCs (they share a CORDIC NCO phase accumulator) in the usrp2/fpga/top/u2_rev3_2rx_iad directory. It is designed to synchronously sample the two inputs of a BasicRX or LFRX as separate real signals. (It also implements an integrate-and-dump decimator instead of the CIC and HB, for unrelated reasons.) The complex outputs of the two DDCs are interleaved and placed into a single data stream, are started and stopped at the same time, and share a common frequency and decimation rate. Thus, the host and firmware code are unchanged. If this serves your purpose, it would be a good place to start. It does sound like, though, from your original post, that you are looking to have independent streams, and the above won't help you. Johnathan _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
