On Wed, May 27, 2009 at 11:35 PM, Karthik <karthik1...@gmail.com> wrote:
> On Wed, May 27, 2009 at 9:18 PM, Firas Abbas <firasmail2...@yahoo.com> wrote:
>>
>> Hi,
>>
>>> On Wed, 5/27/09, Karthik <karthik1...@gmail.com> wrote:
>>>
>>> If you use usrp_c() source, then the real part of the complex values are 
>>> the I values and the imaginary parts are Q values. They are each 16 bits.
>>>
>>> Karthik
>>>
>>
>> That is not correct. If you use usrp_c source, then I & Q each are 32 bits 
>> (total complex is 64bits). However, if you use usrp_s, then each are 16 bits 
>> (total complex is 32bits)..
>>
>> Best Regards,
>>
>> Firas
>>
>
> Apologies for the wrong information. I don't mean to side track the
> original query, but I have a couple of questions.
>
> I found this in the FAQ.
>
> "Regarding the bandwidth, we can sustain 32MB/sec across the USB. All
> samples sent over the USB interface are in 16-bit signed integers in
> IQ format, i.e. 16-bit I and 16-bit Q data (complex) which means 4
> bytes per complex sample. This resulting in a (32MByte per sec/4Byte)
> 8Mega complex samples/sec across the USB."
>
> So I guess here we are assuming that we are using usrp_s() ?
>
>  Also, since the ADC only has 12bit precision, are the extra bits used
> to retain precision as we go through the CIC and Halfband filters?
>
> If I were to use the std_4rx_0tx.rbf and usrp_s() to receive 4
> channels. Then am I correct in saying that I need to have a
> deinterleaver with 8 channels after the usrp_s() from which I will
> club channel 0 and 1 into a new complex stream (similarly for channel
> 2 and 3 etc) to get 4 complex streams?
>
> Thanks,
> Karthik
>

After snooping about a bit more, I found this on "The USRP under a
1.5X Magnifying Lens" ,
http://gnuradio.org/trac/attachment/wiki/UsrpFAQ/USRP_Documentation.pdf.

"Q) ADC samples at 64MHz, and passes through both I and Q channels
over the 24-bit RX bus.
 Internal to the FPGA, the CIC automatically decimates by a value of
at least 4. The halfband
decimating FIR filter internal to the FPGA decimates by a fixed value
of 2. This gives a minimum
decimation rate of 8, leaving 8Msps going over the USB of the USRP.
Is this correct?

A) Yes.  Note that some FPGA builds don't contain the half-band.
With 16-bit I & Q decim =  8 ->  8MS/sec -> 32MB/sec.
With  8-bit I & Q decim =  4 -> 16MS/sec -> 32MB/sec "

Does this mean that when we use usrp_c(), the data sent over USB is
16bit I and Q but the container used to hold it after it reaches the
computer is 32 bit each. And when we use usrp_s(), the data sent is
8bit I and Q and the container used is 16bit?

Karthik


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