On Wed, Apr 01, 2009 at 07:32:04AM +0000, feldmaus wrote:
> Eric Blossom <eb <at> comsec.com> writes:
> 
> > To disable automatic ADC control on all ADC's:
> > 
> >   u.set_dc_offset_cl_enable(0x0, 0xf)
> > 
> > Then set the offset that you want for each ADC using:
> > 
> >   u.set_adc_offset(0, offset0)
> >   u.set_adc_offset(1, offset1)
> >   u.set_adc_offset(2, offset2)
> >   u.set_adc_offset(3, offset3)
> > 
> And if i only want to diable the automatic dc offset loop at
> ADC_0 and ADC_1, then:
> u.set_dc_offset_cl_enable(0x3, 0x3)
> 
> Is this correct ???

No, you'd want

  u.set_dc_offet_cl_enable(0x0, 0x3)

The mask specifies which of the bits will be touched.  value is the
value you want for those bits.  This allows us to do an atomic
read/modify/write.

If reg is a register in the FPGA, mask and value work like this:

  reg = (reg & ~mask) | (value & mask);

Eric


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