I don't think I understand what you're trying to do here. What frames
were you transmitting? What pattern are you looking for? Do you hope
on performing this operation in the FPGA or on the host?
Sorry for my confusion.
No problem, I don't mind trying to be clear :)
Here's an *example* of what I want to overcome: latency between the USRP
and host when ACK'ing a DATA frame in _any_ CSMA type protocol.
The frames I was transmitting are home-made frames that just so happen
to use the same sync bits as the GNU Radio GMSK frames. It's not really
important, but the pattern I am looking for is the start of frame in
sample space.
The "in sample space" is what's important, because I can obviously find
the framing bit sequence by decoding the samples using the PHY layer...
but this incurs the latency over the bus. What I'm trying to do is
detect the start of frame sequence without using the PHY layer to avoid
this latency.
So as a first experiment I would mark what samples were needed to
actually decode the frame bits, and was trying to see if I could pattern
match these raw samples. If there was a high correlation between the
samples, I could simply implement some functionality in the FPGA to look
for this pattern. This would hopefully be independent of the PHY layer
used.
- George
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