Hi,
I've been subscribing to the GNU Radio mailing list for a couple of
months now, but I have been having trouble keeping up with all the
discussions.
I have been using FPGAs since the mid 1990's when I worked at the CSIRO
here in Australia working on Machine Vision. Over the past 5 years, I
suppose, I have been working on FPGA designs more as a hobby than
anything else, starting off with the BurchED B3 and B5-X300 Spartan 2
boards. I've been largely locked into Xilinx rather than Altera, due to
history more than anything else. That's what we used at CSIRO and the
development boards for Xilinx were more readily available here for hobby
use.
I am an amateur radio enthusiast, and am interested in implementing
Digital TV. I believe, reading the GNU Radio web site, that that was one
of the motivations of some of the members here. I have seen some screen
shots of HDTV receiver pictures on the web site, but browsing through
the archives I could not see much in the way of IP for the FPGA or MPEG
encoders and so on for the transmitter. The web site looked as though
the USRP is just used as a decimating front end and that all the signal
processing is done in the PC with Python scripts. I would imagine an
MPEG encoder would not lend itself particularly well to a scripting
language and would have to be implemented as hardware in the FPGA.
I have a bit of an idea about how an MPEG encoder might work, but I am a
bit foggy on how the data stream is encapsulated and transmitted. I
recently attended an Avnet/Xilinx XFest seminar where they gave a talk
about implementing video over ethernet, but their solution was to simply
go out and buy an MPEG encoder core, which I thought was a bit rich. At
least outside the price range of the average hobbyist.
I understand most of the work here is on the USRP Ettus Research Altera
board. Is the Altera device on the USRP large enough for an MPEG encoder ?
I would like to use my existing Xilinx boards if possible. I have a
Virtex4 FX12 board with high speed dual ADC and DAC P160 module and a
XC3S1000 board which I thought might be large enough for the video
encoder. I thought I could connect the boards together over ethernet and
use one as the encoder and one as the transmitter. It's pretty much pie
in the sky stuff at this stage, and the labor involved in designing the
MPEG encoder may well dwarf the cost of the boards anyway.
If the IP is designed well it maybe possible to port it from Xilinx to
Altera and vice versa. I think the only real difference is in the
implementation of on chip memory although of course the hardware
implementation would be different. I'm not sure if the USRP uses a
processor, but that may be another consideration.
The USRP uses USB as the interface. Has any though been given to
connecting the boards over ethernet so multiple boards can communicate
between themselves ?
John.
--
http://www.johnkent.com.au
http://members.optushome.com.au/jekent
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