I'm sorry for being so obtuse, but in that case how do I submit the
merge request to kick off the discussion?
Thanks,
Andras
On 9/5/24 16:34, 'Seth Hillbrand' via KiCad Developers wrote:
I wouldn't worry about the pipeline failing. Once we discuss the
change and decide to merge it, it is not an issue.
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Seth Hillbrand
*Lead Developer*
+1-530-302-5483
Long Beach, CA
www.kipro-pcb.com <https://www.kipro-pcb.com/> i...@kipro-pcb.com
On Thu, Sep 5, 2024 at 10:53 AM Andras Tantos
<and...@tantosonline.com> wrote:
Thanks! However it seems that the merge is blocked with the
failing tests. How can I get the request through even with the
failures in place? (Apologies, I'm new to this process, need some
education.)
Thanks,
Andras
September 5, 2024 2:10 AM, "Jeff Young" <j...@rokeby.ie> wrote:
> It’s known to be acting up, but we don’t know why yet (it seems
to only occur on some machines).
>
> Note that devs can push your MR even if it’s failing tests, so
it’s not a huge issue.
>
> Cheers,
> Jeff.
>
>> On 4 Sep 2024, at 22:56, Andras Tantos
<and...@tantosonline.com> wrote:
>>
>> Hello!
>>
>> I'm trying to submit a pull request, but there are some failing
merge tests so the request is
>> blocked. The test in question all boil down to the following error:
>>
>>>
/builds/andras_tantos/kicad/qa/tests/spice/test_library_spice.cpp(148):
error: in
>>> "SimLibrarySpice/Bjts": check param->value == fmt::format(
"{}000.0{}M", i % 10, i % 10 ) has
>>> failed [100.001E+07 != 1000.01M]
>>> Failure occurred in a following context:
>>> Model index: 1, Model name: _1_PNP_VBIC, Model device type:
PNP, Model type: VBIC
>>> Param name: ver
>>
>> I don't believe this failure has anything to do with my change
plus the values are actually
>> numerically the same, only the representation is different. Is
it a known issue? If so, how can I
>> unblock myself? If not, is the expected behavior the correct one?
>>
>> Thanks,
>> Andras
>>
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