The D05 platform explicitly sets PcdArmArchTimerFreqInHz, however the
intended effect of that is not possible from AArch64 EL2/1, and has
never been performed unless built for ARM.
The Pcd is now being deleted, so drop the setting.
This has however affected timer timout calculations, so could lead to a
change in platform behaviour.
Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
Cc: Wenyi Xie <xiewen...@huawei.com>
Signed-off-by: Leif Lindholm <quic_llind...@quicinc.com>
---
Platform/Hisilicon/D05/D05.dsc | 6 ------
1 file changed, 6 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index d247e67e92fc..0cd98d54ddb3 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -198,12 +198,6 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000
- #
- # ARM Architectual Timer Frequency
- #
- gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|50000000
-
-
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c,
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
--
2.39.2
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