RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.
Signed-off-by: Prabin CA <prabin...@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl | 154
++++++++++++++++++++
2 files changed, 155 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
index 9d07001dec96..7556c1239116 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
@@ -48,6 +48,7 @@ [FixedPcd]
gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+ gArmSgiTokenSpaceGuid.PcdOscLpiEnable
gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
index 8812ea877f7a..f921eeb2d99e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
@@ -8,6 +8,9 @@
* @par Specification Reference:
* - ACPI 6.5, Chapter 5, Section 5.2.11.1, Differentiated System Description
* Table (DSDT)
+* - ACPI 6.5, Chapter 8, Section 8.4.3, Lower Power Idle States
+* - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.1,
+* Idle management and Low Power Idle states
*
**/
@@ -17,6 +20,93 @@
DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
EFI_ACPI_ARM_OEM_REVISION) {
Scope (_SB) {
+ /* _OSC: Operating System Capabilities */
+ Method (_OSC, 4, Serialized) {
+ CreateDWordField (Arg3, 0x00, STS0)
+ CreateDWordField (Arg3, 0x04, CAP0)
+
+ /* Platform-wide Capabilities */
+ If (LEqual (Arg0, ToUUID("0811b06e-4a27-44f9-8d60-3cbbc22e7b48"))) {
+ /* OSC rev 1 supported, for other version, return failure */
+ If (LEqual (Arg1, One)) {
+ And (STS0, Not (OSC_STS_MASK), STS0)
+
+ If (And (CAP0, OSC_CAP_OS_INITIATED_LPI)) {
+ /* OS initiated LPI not supported */
+ And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
+ Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+ }
+
+ If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+ if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+ And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+ Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+ }
+ }
+ } Else {
+ And (STS0, Not (OSC_STS_MASK), STS0)
+ Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
+ }
+ } Else {
+ And (STS0, Not (OSC_STS_MASK), STS0)
+ Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_UUID), STS0)
+ }
+
+ Return (Arg3)
+ }
+
+ Name (PLPI, Package () { /* LPI for Processor, support 2 LPI states */
+ 0, // Version
+ 0, // Level Index
+ 2, // Count
+ Package () { // WFI for CPU
+ 1, // Min residency (uS)
+ 1, // Wake latency (uS)
+ 1, // Flags
+ 0, // Arch Context lost Flags (no loss)
+ 0, // Residency Counter Frequency
+ 0, // No parent state
+ ResourceTemplate () { // Register Entry method
+ Register (FFixedHW,
+ 32, // Bit Width
+ 0, // Bit Offset
+ 0xFFFFFFFF, // Address
+ 3, // Access Size
+ )
+ },
+ ResourceTemplate () { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate () { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "LPI1-Core"
+ },
+ Package () { // Power Gating state for CPU
+ 150, // Min residency (uS)
+ 350, // Wake latency (uS)
+ 1, // Flags
+ 1, // Arch Context lost Flags (Core context lost)
+ 0, // Residency Counter Frequency
+ 0, // No parent state
+ ResourceTemplate () { // Register Entry method
+ Register (FFixedHW,
+ 32, // Bit Width
+ 0, // Bit Offset
+ 0x40000002, // Address (PwrLvl:core, StateTyp:PwrDn)
+ 3, // Access Size
+ )
+ },
+ ResourceTemplate () { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate () { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "LPI3-Core"
+ },
+ })
+
Device (CL00) { // Cluster 0
Name (_HID, "ACPI0010")
Name (_UID, 0)
@@ -25,6 +115,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD",
"ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 0)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -36,6 +130,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 1)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -47,6 +145,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 2)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -58,6 +160,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 3)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -69,6 +175,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 4)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -80,6 +190,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 5)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -91,6 +205,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 6)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -102,6 +220,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 7)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -113,6 +235,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 8)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -124,6 +250,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 9)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -135,6 +265,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 10)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -146,6 +280,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 11)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -157,6 +295,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 12)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -168,6 +310,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 13)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -179,6 +325,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 14)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
@@ -190,6 +340,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
Name (_HID, "ACPI0007")
Name (_UID, 15)
Name (_STA, 0xF)
+
+ Method (_LPI, 0, NotSerialized) {
+ Return (\_SB.PLPI)
+ }
}
}
} // Scope(_SB)
