There is no functional changes, only extract DumpMicrocodeRevision since
only in PEI BSP will detect, apply microcode, and APs will sync
microcode.
Cc: Ray Ni <ray...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Cc: Tom Lendacky <thomas.lenda...@amd.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao....@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Microcode.c | 39
+++++++++++++++++++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.c | 33 ++++-----------------------------
UefiCpuPkg/Library/MpInitLib/MpLib.h | 10 ++++++++++
3 files changed, 53 insertions(+), 29 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c
b/UefiCpuPkg/Library/MpInitLib/Microcode.c
index 8faa93024d..947caee97a 100644
--- a/UefiCpuPkg/Library/MpInitLib/Microcode.c
+++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c
@@ -321,6 +321,45 @@ OnExit:
FreePages (MicrocodeCpuIds, EFI_SIZE_TO_PAGES (CpuMpData->CpuCount * sizeof
(EDKII_PEI_MICROCODE_CPU_ID)));
}
+/**
+ Dump the microcode revision for each core.
+
+ @param[in] CpuMpData Pointer to CPU MP Data
+ **/
+VOID
+DumpMicrocodeRevision (
+ IN CPU_MP_DATA *CpuMpData
+ )
+{
+ UINT32 ThreadId;
+ UINT32 ExpectedMicrocodeRevision;
+ CPU_INFO_IN_HOB *CpuInfoInHob;
+ UINTN Index;
+
+ CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
+ GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL,
NULL, &ThreadId);
+ if (ThreadId == 0) {
+ //
+ // MicrocodeDetect() loads microcode in first thread of each core, so,
+ // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for
first thread of each core.
+ //
+ ExpectedMicrocodeRevision = 0;
+ if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) {
+ ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER
*)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision;
+ }
+
+ DEBUG ((
+ DEBUG_INFO,
+ "CPU[%04d]: Microcode revision = %08x, expected = %08x\n",
+ Index,
+ CpuMpData->CpuData[Index].MicrocodeRevision,
+ ExpectedMicrocodeRevision
+ ));
+ }
+ }
+}
+
/**
Shadow the required microcode patches data into memory.
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 4dac931fa5..785042a8d7 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -2283,37 +2283,12 @@ MpInitLibInitialize (
}
}
- //
- // Dump the microcode revision for each core.
- //
- DEBUG_CODE_BEGIN ();
- UINT32 ThreadId;
- UINT32 ExpectedMicrocodeRevision;
-
- CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
- for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
- GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL,
NULL, &ThreadId);
- if (ThreadId == 0) {
- //
- // MicrocodeDetect() loads microcode in first thread of each core, so,
- // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for
first thread of each core.
- //
- ExpectedMicrocodeRevision = 0;
- if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) {
- ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER
*)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision;
- }
-
- DEBUG ((
- DEBUG_INFO,
- "CPU[%04d]: Microcode revision = %08x, expected = %08x\n",
- Index,
- CpuMpData->CpuData[Index].MicrocodeRevision,
- ExpectedMicrocodeRevision
- ));
- }
+ if (MpHandOff == NULL) {
+ DEBUG_CODE (
+ DumpMicrocodeRevision (CpuMpData);
+ );
}
- DEBUG_CODE_END ();
//
// Initialize global data for MP support
//
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 01b5b9c113..fd302e6845 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -734,6 +734,16 @@ MicrocodeDetect (
IN UINTN ProcessorNumber
);
+/**
+ Dump the microcode revision for each core.
+
+ @param[in] CpuMpData Pointer to CPU MP Data
+ **/
+VOID
+DumpMicrocodeRevision (
+ IN CPU_MP_DATA *CpuMpData
+ );
+
/**
Shadow the required microcode patches data into memory.
--
2.39.1.windows.1
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