The DXE stage's Microcode loading process has been elimincated by:
1. Let ShadowMicrocodeUpdatePatch and MicrocodeDetect for BSP performed
only during the PEI phase. DXE skip those actions.
2. BSP in DXE WakeUpAp only for synchronizing MTRR settings, not loading
microcode.
Synchronizing the MTRRs setting to the APs is always essential.
The modification of the MTRRs on the BSP may happens during
timing in the early DXE phase, while the CpuMp PPI service and
the CpuMp Protocol both not available.
Cc: Ray Ni <ray...@intel.com>
Cc: Eric Dong <eric.d...@intel.com>
Cc: Rahul Kumar <rahul1.ku...@intel.com>
Cc: Tom Lendacky <thomas.lenda...@amd.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao....@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Microcode.c | 46
----------------------------------------------
UefiCpuPkg/Library/MpInitLib/MpLib.c | 39
++++++++++++++++++++++++---------------
UefiCpuPkg/Library/MpInitLib/MpLib.h | 21 ---------------------
3 files changed, 24 insertions(+), 82 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c
b/UefiCpuPkg/Library/MpInitLib/Microcode.c
index 11720560af..8faa93024d 100644
--- a/UefiCpuPkg/Library/MpInitLib/Microcode.c
+++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c
@@ -338,49 +338,3 @@ ShadowMicrocodeUpdatePatch (
ShadowMicrocodePatchByPcd (CpuMpData);
}
}
-
-/**
- Get the cached microcode patch base address and size from the microcode patch
- information cache HOB.
-
- @param[out] Address Base address of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
- @param[out] RegionSize Size of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
-
- @retval TRUE The microcode patch information cache HOB is found.
- @retval FALSE The microcode patch information cache HOB is not found.
-
-**/
-BOOLEAN
-GetMicrocodePatchInfoFromHob (
- UINT64 *Address,
- UINT64 *RegionSize
- )
-{
- EFI_HOB_GUID_TYPE *GuidHob;
- EDKII_MICROCODE_PATCH_HOB *MicrocodePathHob;
-
- GuidHob = GetFirstGuidHob (&gEdkiiMicrocodePatchHobGuid);
- if (GuidHob == NULL) {
- DEBUG ((DEBUG_INFO, "%a: Microcode patch cache HOB is not found.\n",
__func__));
- return FALSE;
- }
-
- MicrocodePathHob = GET_GUID_HOB_DATA (GuidHob);
-
- *Address = MicrocodePathHob->MicrocodePatchAddress;
- *RegionSize = MicrocodePathHob->MicrocodePatchRegionSize;
-
- DEBUG ((
- DEBUG_INFO,
- "%a: MicrocodeBase = 0x%lx, MicrocodeSize = 0x%lx\n",
- __func__,
- *Address,
- *RegionSize
- ));
-
- return TRUE;
-}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 9a6ec5db5c..1fd6440a53 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -451,12 +451,20 @@ ApInitializeSync (
CpuMpData = (CPU_MP_DATA *)Buffer;
Status = GetProcessorNumber (CpuMpData, &ProcessorNumber);
ASSERT_EFI_ERROR (Status);
+ ASSERT (CpuMpData->InitFlag == ApInitReconfig || CpuMpData->InitFlag ==
ApInitDone);
+ if (CpuMpData->InitFlag != ApInitReconfig) {
+ //
+ // Load microcode on AP for PEI phase.
+ // During the DXE phase, it cannot omitted.
+ //
+ MicrocodeDetect (CpuMpData, ProcessorNumber);
+ }
+
//
- // Load microcode on AP
- //
- MicrocodeDetect (CpuMpData, ProcessorNumber);
- //
- // Sync BSP's MTRR table to AP
+ // Synchronizing the MTRRs setting to the APs is always essential.
+ // The modification of the MTRRs on the BSP may happens during
+ // timing in the early DXE phase, while the CpuMp PPI service and
+ // the CpuMp Protocol are both not available.
//
MtrrSetAllMtrrs (&CpuMpData->MtrrTable);
}
@@ -2224,29 +2232,25 @@ MpInitLibInitialize (
}
}
- if (!GetMicrocodePatchInfoFromHob (
- &CpuMpData->MicrocodePatchAddress,
- &CpuMpData->MicrocodePatchRegionSize
- ))
- {
+ if (MpHandOff == NULL) {
//
// The microcode patch information cache HOB does not exist, which means
// the microcode patches data has not been loaded into memory yet
//
ShadowMicrocodeUpdatePatch (CpuMpData);
+ //
+ // Detect and apply Microcode on BSP
+ //
+ MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
}
- //
- // Detect and apply Microcode on BSP
- //
- MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
//
// Store BSP's MTRR setting
//
MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
//
- // Wakeup APs to do some AP initialize sync (Microcode & MTRR)
+ // Wakeup APs to do some AP initialize sync (MTRR and/or Microcode).
//
if (CpuMpData->CpuCount > 1) {
if (MpHandOff != NULL) {
@@ -2258,6 +2262,11 @@ MpInitLibInitialize (
CpuMpData->InitFlag = ApInitReconfig;
}
+ //
+ // Wake up APs to perform AP initialization synchronization.
+ // 1. For the PEI stage, load microcode and synchronize MTRRs,
+ // 2. For the DXE phase, only synchronize MTRRs.
+ //
WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);
//
// Wait for all APs finished initialization
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 763db4963d..01b5b9c113 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -744,27 +744,6 @@ ShadowMicrocodeUpdatePatch (
IN OUT CPU_MP_DATA *CpuMpData
);
-/**
- Get the cached microcode patch base address and size from the microcode patch
- information cache HOB.
-
- @param[out] Address Base address of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
- @param[out] RegionSize Size of the microcode patches data.
- It will be updated if the microcode patch
- information cache HOB is found.
-
- @retval TRUE The microcode patch information cache HOB is found.
- @retval FALSE The microcode patch information cache HOB is not found.
-
-**/
-BOOLEAN
-GetMicrocodePatchInfoFromHob (
- UINT64 *Address,
- UINT64 *RegionSize
- );
-
/**
Detect whether Mwait-monitor feature is supported.
--
2.39.1.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#111687): https://edk2.groups.io/g/devel/message/111687
Mute This Topic: https://groups.io/mt/102775771/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-
