On Sun, Oct 29, 2023 at 2:46 PM Dhaval Sharma <dha...@rivosinc.com> wrote: > > Implementing code to support Cache Management Operations (CMO) defined by > RISC-V CMO instructions.https://github.com/riscv/riscv-CMOs > This is a re-write of original series v5. > The patchset contains 5 patches- created based on V5 feedback. > 1. Restructuring of existing code and move instruction declarations into > BaseLib > 2. Renaming existing functions to denote type of instruction used to maanage > cache. > This is useful for further patches where more cache management > instructions are added. > 3. Add the new cache maintenance operations to BaseLib, including the > new assembly instruction encodings. > 4. Update BaseCacheMaintenanceLib (utilizing the new BaseLib primitives) > 5. Add platform level PCD to allow overriding of RISC-V features. >
With or without nits fixed: Reviewed-by: Pedro Falcato <pedro.falc...@gmail.com> But I would *really* prefer it if you could test this on a real board with this extension. -- Pedro -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110277): https://edk2.groups.io/g/devel/message/110277 Mute This Topic: https://groups.io/mt/102256459/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
