> - mSmmS3ResumeState->SmmS3Cr3 = (UINT32)(UINTN)PTEntry;
> + mSmmS3ResumeState->SmmS3Cr3 = (UINT32)GenSmmPageTable
> (Paging4Level, 32);
Why is "Paging4Level" used for S3 page table?
The S3 page table is used by S3Resume module:
if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
//
// Switch to long mode to complete resume.
//
......
AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
......
AsmEnablePaging64 (
0x38,
SmmS3ResumeState->SmmS3ResumeEntryPoint,
(UINT64)(UINTN)AcpiS3Context,
0,
SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize
);
The S3 page table is only used when PEI runs in 32bit mode, which revolves my
concern
that CPU in 64bit mode cannot switch from 5-l paging to 4-l paging.
And I guess your code just aligns to the old behavior.
Can you add comments to above to explain the SmmS3Cr3 is only used by S3Resume
PEIM
to switch CPU from 32bit to 64bit?
With that, Reviewed-by: Ray Ni <ray...@intel.com>
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