> Using 5level paging when the below two conditions are both true: > 1. CPU support 5level paging > 2. Platform choose to use 5level paging. (by specifing macro > USE_5_LEVEL_PAGE_TABLE) > > There is an assumption that if platform choose to use 5level paging, > then 5level paging should be supported by CPU. (Platform should know > its CPU capability)
That assumption does not hold for virtual machines. OVMF builds with 5-level paging support enabled should continue to work on CPUs without 5-level paging support. > If Platform choose to use 4level paging at build time, we can save 4K space > by not creating the 5 level page. I'm fine with that. But with 5-level paging enabled the reset vector should be able to fallback to 4-level paging in case the CPU does not support 5-level paging. take care, Gerd -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102993): https://edk2.groups.io/g/devel/message/102993 Mute This Topic: https://groups.io/mt/98031298/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
