> > @@ -555,19 +556,25 @@ InitMpGlobalData (
> > )
> > );
> >
> > - mReservedTopOfApStack = (UINTN)AllocateReservedPages (EFI_SIZE_TO_PAGES
> > (ApSafeBufferSize));
> > - ASSERT (mReservedTopOfApStack != 0);
> > - ASSERT ((mReservedTopOfApStack & (UINTN)(CPU_STACK_ALIGNMENT - 1)) == 0);
> > - ASSERT ((AP_SAFE_STACK_SIZE & (CPU_STACK_ALIGNMENT - 1)) == 0);
> > -
> > - mReservedApLoopFunc = (VOID *)(mReservedTopOfApStack +
> > CpuMpData->CpuCount * AP_SAFE_STACK_SIZE);
> > - if (StandardSignatureIsAuthenticAMD ()) {
> > + if (StandardSignatureIsAuthenticAMD () && (sizeof (UINTN) == sizeof
> > (UINT64))) {
>
> This looks the wrong way around.
Ard,
Only AMD X64 (including SEV and without SEV) runs the code that switches to
32bit paging disabled mode.
Intel X64 runs the code that stays at 64bit paging mode. So no need for <4G
memory.
All IA32 CPUs (including intel and AMD) stays at 32bit paging disabled mode.
The AllocateReservedPages() call
should not return a memory above 4GB in 32bit env.
Did I miss anything?
Thanks,
Ray
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