Reviewed-by: Ankit Sinha <ankit.si...@intel.com> > -----Original Message----- > From: Desimone, Nathaniel L <nathaniel.l.desim...@intel.com> > Sent: Monday, June 6, 2022 3:50 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.c...@intel.com>; Sinha, Ankit > <ankit.si...@intel.com>; Kubacki, Michael > <michael.kuba...@microsoft.com> > Subject: [edk2-platforms] [PATCH V1 2/4] WhiskeylakeOpenBoardPkg: > Indicate width of CLK duty cycle in FADT > > Set the location of the DUTY_CYCLE field in the P_CNT register and indicate > the width of the clock duty cycle to OS power management > > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Ankit Sinha <ankit.si...@intel.com> > Cc: Michael Kubacki <michael.kuba...@microsoft.com> > Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > --- > .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 9 > ++++++++- > .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 9 ++++++++- > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd. > dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd. > dsc > index 84d4ec1331..8f3cc6ba28 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd. > dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd. > ds > +++ c > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the UpXtreme board. > # > -# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR> > +# Copyright (c) 2020 - 2022, Intel Corporation. All rights > +reserved.<BR> > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -259,6 +259,13 @@ > gSiPkgTokenSpaceGuid.PcdSerialIoUartNumber|2 > > gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgToken > SpaceGuid.PcdPciExpressRegionLength > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + > ###################################### > # Platform Configuration > ###################################### > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > PkgPcd.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > PkgPcd.dsc > index 4a7ba4d5f0..4a5d5ef03b 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > PkgPcd.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoard > Pk > +++ gPcd.dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the WhiskeylakeURvp board. > # > -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR> > +# Copyright (c) 2019 - 2022, Intel Corporation. All rights > +reserved.<BR> > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -242,6 +242,13 @@ > ###################################### > > gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgToken > SpaceGuid.PcdPciExpressRegionLength > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + > ###################################### > # Platform Configuration > ###################################### > -- > 2.27.0.windows.1
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