Ok for me.
Regards,
Jian
> -----Original Message-----
> From: Xu, Min M <min.m...@intel.com>
> Sent: Friday, March 04, 2022 8:19 AM
> To: Wang, Jian J <jian.j.w...@intel.com>; devel@edk2.groups.io
> Cc: Wu, Hao A <hao.a...@intel.com>; Brijesh Singh <brijesh.si...@amd.com>;
> Aktas, Erdem <erdemak...@google.com>; James Bottomley
> <j...@linux.ibm.com>; Yao, Jiewen <jiewen....@intel.com>; Tom Lendacky
> <thomas.lenda...@amd.com>; Gerd Hoffmann <kra...@redhat.com>
> Subject: RE: [PATCH V7 25/37] MdeModulePkg: EFER should not be changed in
> TDX
>
> On March 3, 2022 11:12 AM, Wang Jian wrote:
> >
> > Hi Min,
> >
> > I think the PCD should not be dynamic. Dynamic PCD is used for those
> > features which can be changed at boot time. But, for Intel processor, it
> > should always stay as FALSE. So there's no need to make it dynamic.
> > FixedAtBuild should be fine.
> >
> I realize this PCD is not necessary. According to [TDX] Sec 10.1.5,
> IA32_EFER.NXE is initialized to 1. So in the function EnableExecuteDisableBit
> @
> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c, we can check if BIT11
> is set before calling AsmWriteMsr64. It looks like:
> VOID EnableExecuteDisableBit ( VOID )
> {
> UINT64 MsrRegisters;
>
> MsrRegisters = AsmReadMsr64 (0xC0000080);
> if ((MsrRegisters & BIT11) == 0) {
> MsrRegisters |= BIT11;
> AsmWriteMsr64 (0xC0000080, MsrRegisters);
> }
> }
>
> [TDX]
> https://www.intel.com/content/dam/develop/external/us/en/documents/tdx-
> module-1.0-public-spec-v0.931.pdf
>
> Thanks
> Min
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