(This is migrated from edk2-platforms:Platform)
- Add RISC-V PeiCoreEntryPoint library that incorporates with
opensbi next phase switching mechanism.
- Use RiscVFirmwareContext library to get the pointer of
opensbi FirmwareContext.
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schae...@hpe.com>
Signed-off-by: Abner Chang <abner.ch...@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schae...@hpe.com>
Reviewed-by: Sunil V L <suni...@ventanamicro.com>
---
.../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 7 +-
.../PeiCoreEntryPoint/PeiCoreEntryPoint.inf | 36 +++++++
.../PeiCoreEntryPoint/PeiCoreEntryPoint.c | 97 +++++++++++++++++++
.../PeiCoreEntryPoint/PeiCoreEntryPoint.uni | 14 +++
4 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644
Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
create mode 100644
Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c
create mode 100644
Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.uni
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
index 5d9674a965..8eec09549f 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
@@ -1,7 +1,7 @@
#/** @file
# RISC-V platform package.
#
-# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -58,6 +58,10 @@
TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+[LibraryClasses.common.PEI_CORE]
+ # RISC-V platform PEI core entry point.
+
PeiCoreEntryPoint|Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+
[LibraryClasses.common.PEIM]
FirmwareContextProcessorSpecificLib|Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
@@ -77,6 +81,7 @@
Platform/RISC-V/PlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf
Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
Platform/RISC-V/PlatformPkg/Library/RiscVPlatformTempMemoryInitLibNull/RiscVPlatformTempMemoryInitLibNull.inf
+ Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
[Components.common.SEC]
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
new file mode 100644
index 0000000000..e16a974636
--- /dev/null
+++
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
@@ -0,0 +1,36 @@
+## @file
+# Module entry point library for PEI core on RISC-V with RISC-V OpenSBI.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiCoreEntryPoint
+ MODULE_UNI_FILE = PeiCoreEntryPoint.uni
+ FILE_GUID = 2EBF4D2C-99B2-4A09-8C5C-318FB0EF7250
+ MODULE_TYPE = PEI_CORE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeiCoreEntryPoint|PEI_CORE
+
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ PeiCoreEntryPoint.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ RiscVFirmwareContextLib
+
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c
new file mode 100644
index 0000000000..2fd0f2315b
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c
@@ -0,0 +1,97 @@
+/** @file
+ Entry point to a the PEI Core on RISC-V platform with RISC-V OpenSBI.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include <PiPei.h>
+#include <IndustryStandard/RiscVOpensbi.h>
+//
+// The Library classes this module produced
+//
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiCoreEntryPoint.h>
+#include <Library/RiscVFirmwareContextLib.h>
+
+/**
+ The entry point of PE/COFF Image for the PEI Core.
+
+ This function is the entry point for the PEI Foundation, which allows the
SEC phase
+ to pass information about the stack, temporary RAM and the Boot Firmware
Volume.
+ In addition, it also allows the SEC phase to pass services and data forward
for use
+ during the PEI phase in the form of one or more PPIs.
+ There is no limit to the number of additional PPIs that can be passed from
SEC into
+ the PEI Foundation. As part of its initialization phase, the PEI Foundation
will add
+ these SEC-hosted PPIs to its PPI database such that both the PEI Foundation
and any
+ modules can leverage the associated service calls and/or code in these early
PPIs.
+ This function is required to call ProcessModuleEntryPointList() with the
Context
+ parameter set to NULL. ProcessModuleEntryPoint() is never expected to
return.
+ The PEI Core is responsible for calling ProcessLibraryConstructorList() as
soon as
+ the PEI Services Table and the file handle for the PEI Core itself have been
established.
+ If ProcessModuleEntryPointList() returns, then ASSERT() and halt the system.
+
+ @param SecCoreData This is actually the RISC-V boot HART ID passed in a0
register.
+
+ @param PpiList This is actually the EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT
passed
+ in a1 register.
+
+**/
+VOID
+EFIAPI
+_ModuleEntryPoint(
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList
+)
+{
+ EFI_SEC_PEI_HAND_OFF *ThisSecCoreData;
+ EFI_PEI_PPI_DESCRIPTOR *ThisPpiList;
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
+
+ FirmwareContext = (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)PpiList;
+ SetFirmwareContextPointer (FirmwareContext);
+ ThisSecCoreData = (EFI_SEC_PEI_HAND_OFF *)FirmwareContext->SecPeiHandOffData;
+ ThisPpiList = (EFI_PEI_PPI_DESCRIPTOR *)FirmwareContext->SecPeiHandoffPpi;
+ ProcessModuleEntryPointList (ThisSecCoreData, ThisPpiList, NULL);
+
+ //
+ // Should never return
+ //
+ ASSERT(FALSE);
+ CpuDeadLoop ();
+}
+
+
+/**
+ Required by the EBC compiler and identical in functionality to
_ModuleEntryPoint().
+
+ This function is required to call _ModuleEntryPoint() passing in SecCoreData
and PpiList.
+
+ @param SecCoreData Points to a data structure containing information about
the PEI core's
+ operating environment, such as the size and location of
temporary RAM,
+ the stack location and the BFV location.
+
+ @param PpiList Points to a list of one or more PPI descriptors to be
installed
+ initially by the PEI core. An empty PPI list consists of
+ a single descriptor with the end-tag
+ EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST.
+ As part of its initialization phase, the PEI Foundation
will
+ add these SEC-hosted PPIs to its PPI database, such that
both
+ the PEI Foundationand any modules can leverage the
associated
+ service calls and/or code in these early PPIs.
+
+**/
+VOID
+EFIAPI
+EfiMain (
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList
+ )
+{
+ _ModuleEntryPoint (SecCoreData, PpiList);
+}
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.uni
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.uni
new file mode 100644
index 0000000000..1955b7a05b
--- /dev/null
+++
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Module entry point library for PEI core on RISC-V with RISC-V OpenSBI.
+//
+// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "RISC-V module entry
point library for PEI core"
+
+#string STR_MODULE_DESCRIPTION #language en-US "RISC-V module entry
point library for PEI core."
+
--
2.31.1
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