On Wed, Oct 13, 2021 at 11:56:58AM -0500, Brijesh Singh wrote: > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 > > The initial page built during the SEC phase is used by the > MemEncryptSevSnpValidateSystemRam() for the system RAM validation. The > page validation process requires using the PVALIDATE instruction; the > instruction accepts a virtual address of the memory region that needs > to be validated. If hardware encounters a page table walk failure (due > to page-not-present) then it raises #GP. > > The initial page table built in SEC phase address up to 4GB. Add an > internal function to extend the page table to cover > 4GB. The function > builds 1GB entries in the page table for access > 4GB. This will provide > the support to call PVALIDATE instruction for the virtual address > > 4GB in PEI phase.
I think I asked this before: This is likewise temporary until the memory core can track page state and ovmf can handle lazy acceptance/validation of memory > 4G in DXE phase, correct? Can you add a comment for that? The code looks good. take care, Gerd -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#81990): https://edk2.groups.io/g/devel/message/81990 Mute This Topic: https://groups.io/mt/86292905/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
