On September 11, 2021 9:14 AM, Erdem Aktas wrote:
> 
> On Thu, Aug 12, 2021 at 2:57 PM Min Xu <min.m...@intel.com> wrote:
> >
> > +;
> > +; Check if it is Intel Tdx
> > +;
> > +; Modified: EAX, EBX, ECX, EDX
> > +;
> > +; If it is Intel Tdx, EAX is zero
> > +; If it is not Intel Tdx, EAX is non-zero ;
> > +IsTdx:
> IsTdx returns 0 when TDX is enabled in CPUID but IsTdxEnabled return 1
> when TDX is enabled. Is this intentional?
I will make the return result of IsTdx and IsTdxEnabled consistent.
If it is Intel TDX, EAX is 1, otherwise it is 0.
> 
> here is how IsTdxEnabled defined.
> ; If TDX is enabled then EAX will be 1
> ; If TDX is disabled then EAX will be 0.
> ;
> IsTdxEnabled:
> 
> > +TdxApWait:
> > +    cmp     byte[TDX_WORK_AREA_PGTBL_READY], 0
> > +    je      TdxApWait
> Don't we need memory fence before  je      TdxApWait. I did not check
> what the compiler generates for this loop.
Below is the code compiler generated for this loop. (VS2017/release)
   106                                                          <1> TdxApWait:
   107 0000070B 803D04B0800000      <1>     cmp     
byte[TDX_WORK_AREA_PGTBL_READY], 0
   108 00000712 74F7                             <1>     je          TdxApWait
   109 00000714 EB17                             <1>     jmp      
ExitInitTdxWorkarea

This is the code lfence is added.
   106                                                          <1> TdxApWait:
   107 0000070B 803D04B0800000      <1>     cmp     
byte[TDX_WORK_AREA_PGTBL_READY], 0
   108 00000712 0FAEE8                         <1>     lfence
   109 00000715 74F4                              <1>     je         TdxApWait
   110 00000717 EB17                              <1>     jmp     
ExitInitTdxWorkarea

I am not sure if lfence is needed.
> 

Thanks!
Min


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