[edk2-devel] [PATCH v2 9/9] ArmPkg/ArmLib: ASSERT on set/way cache ops being used with MMU on

[Ard Biesheuvel]

On ARMv7 and up, doing cache maintenance by set/way is only
permitted in the context of on/offlining a core, and any other
uses should be avoided. Add ASSERT()s in the right place to
ensure that any uses with the MMU enabled are caught in DEBUG
builds.

Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 7 +++++++
 ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c       | 7 +++++++
 ArmPkg/Library/ArmLib/ArmBaseLib.inf       | 3 +++
 3 files changed, 17 insertions(+)

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c 
b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index 924bf48020e0..3fbd591192e2 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -10,6 +10,7 @@
 #include <Base.h>
 
 #include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
 
 #include <Chipset/AArch64.h>
 
@@ -41,6 +42,8 @@ ArmInvalidateDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
 }
@@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
 }
@@ -61,6 +66,8 @@ ArmCleanDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
 }
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c 
b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
index 5d93aa6e0b8c..2c4a23e1a1b2 100644
--- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
+++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c
@@ -10,6 +10,7 @@
 #include <Base.h>
 
 #include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
 
 #include <Chipset/ArmV7.h>
 
@@ -41,6 +42,8 @@ ArmInvalidateDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
 }
@@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
 }
@@ -61,6 +66,8 @@ ArmCleanDataCache (
   VOID
   )
 {
+  ASSERT (!ArmMmuEnabled ());
+
   ArmDataSynchronizationBarrier ();
   ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
 }
diff --git a/ArmPkg/Library/ArmLib/ArmBaseLib.inf 
b/ArmPkg/Library/ArmLib/ArmBaseLib.inf
index 106a09f821e1..f61c71b673d1 100644
--- a/ArmPkg/Library/ArmLib/ArmBaseLib.inf
+++ b/ArmPkg/Library/ArmLib/ArmBaseLib.inf
@@ -44,6 +44,9 @@ [Sources.AARCH64]
   AArch64/AArch64Support.S
   AArch64/AArch64ArchTimerSupport.S
 
+[LibraryClasses]
+  DebugLib
+
 [Packages]
   ArmPkg/ArmPkg.dec
   MdePkg/MdePkg.dec
-- 
2.17.1


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