Now that the SMRAM at the default SMBASE is honored everywhere necessary, implement the actual detection. The (simple) steps are described in previous patch "OvmfPkg/IndustryStandard: add MCH_DEFAULT_SMBASE* register macros".
Regarding CSM_ENABLE builds: according to the discussion with Jiewen at https://edk2.groups.io/g/devel/message/48082 http://mid.mail-archive.com/74D8A39837DF1E4DA445A8C0B3885C503F7C9D2F@shsmsx102.ccr.corp.intel.com if the platform has SMRAM at the default SMBASE, then we have to (a) either punch a hole in the legacy E820 map as well, in LegacyBiosBuildE820() [OvmfPkg/Csm/LegacyBiosDxe/LegacyBootSupport.c], (b) or document, or programmatically catch, the incompatibility between the "SMRAM at default SMBASE" and "CSM" features. Because CSM is out of scope for the larger "VCPU hotplug with SMM" feature, option (b) applies. Therefore, if the CSM is enabled in the OVMF build, then PlatformPei will not attempt to detect SMRAM at the default SMBASE, at all. This is approach (4) -- the most flexible one, for end-users -- from: http://mid.mail-archive.com/868dcff2-ecaa-e1c6-f018-abe7087d640c@redhat.com https://edk2.groups.io/g/devel/message/48348 Cc: Ard Biesheuvel <ard.biesheu...@linaro.org> Cc: Jiewen Yao <jiewen....@intel.com> Cc: Jordan Justen <jordan.l.jus...@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512 Signed-off-by: Laszlo Ersek <ler...@redhat.com> --- Notes: v2: - In CSM_ENABLE builds, pretend that SMRAM never exists at the default SMBASE [Jiewen] - trim Cc list OvmfPkg/PlatformPei/PlatformPei.inf | 1 + OvmfPkg/PlatformPei/MemDetect.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf index 25229618ed13..c51a6176aa2e 100644 --- a/OvmfPkg/PlatformPei/PlatformPei.inf +++ b/OvmfPkg/PlatformPei/PlatformPei.inf @@ -106,6 +106,7 @@ [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress [FeaturePcd] + gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire [Ppis] diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 8fdc9c2ed7c9..47dc9c543719 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -103,6 +103,22 @@ Q35SmramAtDefaultSmbaseInitialization ( ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID); mQ35SmramAtDefaultSmbase = FALSE; + if (FeaturePcdGet (PcdCsmEnable)) { + DEBUG ((DEBUG_INFO, "%a: SMRAM at default SMBASE not checked due to CSM\n", + __FUNCTION__)); + } else { + UINTN CtlReg; + UINT8 CtlRegVal; + + CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL); + PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY); + CtlRegVal = PciRead8 (CtlReg); + mQ35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal == + MCH_DEFAULT_SMBASE_IN_RAM); + DEBUG ((DEBUG_INFO, "%a: SMRAM at default SMBASE %a\n", __FUNCTION__, + mQ35SmramAtDefaultSmbase ? "found" : "not found")); + } + PcdStatus = PcdSetBoolS (PcdQ35SmramAtDefaultSmbase, mQ35SmramAtDefaultSmbase); ASSERT_RETURN_ERROR (PcdStatus); -- 2.19.1.3.g30247aa5d201 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#53544): https://edk2.groups.io/g/devel/message/53544 Mute This Topic: https://groups.io/mt/70252365/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
