Reviewed-by: Michael D Kinney <michael.d.kin...@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On
> Behalf Of Philippe Mathieu-Daudé
> Sent: Tuesday, December 3, 2019 8:15 AM
> To: devel@edk2.groups.io
> Cc: Antoine Coeur <co...@gmx.fr>; Kinney, Michael D
> <michael.d.kin...@intel.com>; Gao, Liming
> <liming....@intel.com>; Philippe Mathieu-Daude
> <phi...@redhat.com>
> Subject: [edk2-devel] [PATCH 30/79] MdePkg/Register:
> Fix various typos
>
> From: Antoine Coeur <co...@gmx.fr>
>
> Fix various typos in comments and documentation.
>
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <liming....@intel.com>
> Reviewed-by: Philippe Mathieu-Daude <phi...@redhat.com>
> Signed-off-by: Philippe Mathieu-Daude
> <phi...@redhat.com>
> ---
> MdePkg/Include/Register/Amd/Cpuid.h
> | 8 ++++----
> MdePkg/Include/Register/Amd/Fam17Msr.h
> | 2 +-
> MdePkg/Include/Register/Amd/Msr.h
> | 2 +-
> MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
> | 2 +-
> MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
> | 2 +-
> MdePkg/Include/Register/Intel/StmResourceDescriptor.h
> | 2 +-
> 6 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/MdePkg/Include/Register/Amd/Cpuid.h
> b/MdePkg/Include/Register/Amd/Cpuid.h
> index ad1ba4d016e0..8e91e84b767f 100644
> --- a/MdePkg/Include/Register/Amd/Cpuid.h
> +++ b/MdePkg/Include/Register/Amd/Cpuid.h
> @@ -11,7 +11,7 @@
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Specification Reference:
> - AMD64 Architecture Programming Manaul volume 2,
> March 2017, Sections 15.34
> + AMD64 Architecture Programming Manual volume 2,
> March 2017, Sections 15.34
>
> **/
>
> @@ -364,7 +364,7 @@ typedef union {
> ///
> UINT32 Page1GB:1;
> ///
> - /// [Bit 27] RDTSCP intructions.
> + /// [Bit 27] RDTSCP instructions.
> ///
> UINT32 RDTSCP:1;
> ///
> @@ -513,9 +513,9 @@ typedef union {
>
> @retval EAX Extended APIC ID described by the type
> CPUID_AMD_PROCESSOR_TOPOLOGY_EAX.
> - @retval EBX Core Indentifiers described by the
> type
> + @retval EBX Core Identifiers described by the type
> CPUID_AMD_PROCESSOR_TOPOLOGY_EBX.
> - @retval ECX Node Indentifiers described by the
> type
> + @retval ECX Node Identifiers described by the type
> CPUID_AMD_PROCESSOR_TOPOLOGY_ECX.
> @retval EDX Reserved.
> **/
> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h
> b/MdePkg/Include/Register/Amd/Fam17Msr.h
> index 37b935dcdb30..6ef45a9b21d3 100644
> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> @@ -10,7 +10,7 @@
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Specification Reference:
> - AMD64 Architecture Programming Manaul volume 2,
> March 2017, Sections 15.34
> + AMD64 Architecture Programming Manual volume 2,
> March 2017, Sections 15.34
>
> **/
>
> diff --git a/MdePkg/Include/Register/Amd/Msr.h
> b/MdePkg/Include/Register/Amd/Msr.h
> index e74de7a1df48..084eb892cdd9 100644
> --- a/MdePkg/Include/Register/Amd/Msr.h
> +++ b/MdePkg/Include/Register/Amd/Msr.h
> @@ -10,7 +10,7 @@
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Specification Reference:
> - AMD64 Architecture Programming Manaul volume 2,
> March 2017, Sections 15.34
> + AMD64 Architecture Programming Manual volume 2,
> March 2017, Sections 15.34
>
> **/
>
> diff --git
> a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
> b/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
> index 2edc1363b7c4..c56d20df66a4 100644
> ---
> a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
> +++
> b/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
> @@ -1,5 +1,5 @@
> /** @file
> - MSR Defintions for Intel Atom processors based on
> the Goldmont Plus microarchitecture.
> + MSR Definitions for Intel Atom processors based on
> the Goldmont Plus microarchitecture.
>
> Provides defines for Machine Specific Registers(MSR)
> indexes. Data structures
> are provided for MSRs that contain one or more bit
> fields. If the MSR value
> diff --git
> a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
> b/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
> index 30f96f0e82fa..03cac77c19a6 100644
> --- a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
> +++ b/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
> @@ -1,5 +1,5 @@
> /** @file
> - MSR Defintions for Intel processors based on the
> Skylake/Kabylake/Coffeelake/Cannonlake
> microarchitecture.
> + MSR Definitions for Intel processors based on the
> Skylake/Kabylake/Coffeelake/Cannonlake
> microarchitecture.
>
> Provides defines for Machine Specific Registers(MSR)
> indexes. Data structures
> are provided for MSRs that contain one or more bit
> fields. If the MSR value
> diff --git
> a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
> b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
> index da4c91d0f4b8..3e426701e83c 100644
> ---
> a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
> +++
> b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
> @@ -179,7 +179,7 @@ typedef struct {
> } STM_RSC_ALL_RESOURCES_DESC;
>
> /**
> - STM Register Volation Descriptor
> + STM Register Violation Descriptor
> **/
> typedef struct {
> STM_RSC_DESC_HEADER Hdr;
> --
> 2.21.0
>
>
>
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