From: Tom Lendacky <thomas.lenda...@amd.com> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a CPUID instruction requires the current value of the XCR0 register. In order to retrieve that value, the XGETBV instruction needs to be executed. Provide the necessary support to execute the XGETBV instruction. Cc: Michael D Kinney <michael.d.kin...@intel.com> Cc: Liming Gao <liming....@intel.com> Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com> --- MdePkg/Library/BaseLib/BaseLib.inf | 2 ++ MdePkg/Include/Library/BaseLib.h | 16 ++++++++++++ MdePkg/Library/BaseLib/Ia32/GccInline.c | 28 ++++++++++++++++++++ MdePkg/Library/BaseLib/X64/GccInline.c | 30 ++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/XGetBv.nasm | 31 ++++++++++++++++++++++ MdePkg/Library/BaseLib/X64/XGetBv.nasm | 34 +++++++++++++++++++++++++ 6 files changed, 141 insertions(+) create mode 100644 MdePkg/Library/BaseLib/Ia32/XGetBv.nasm create mode 100644 MdePkg/Library/BaseLib/X64/XGetBv.nasm diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 14b3f5721101..ea3e284bf8bf 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -153,6 +153,7 @@ [Sources.Ia32] Ia32/EnableCache.c | MSFT Ia32/DisableCache.c | MSFT Ia32/VmgExit.nasm | MSFT + Ia32/XGetBv.nasm | MSFT Ia32/GccInline.c | GCC @@ -288,6 +289,7 @@ [Sources.X64] X64/ReadCr0.nasm| MSFT X64/ReadEflags.nasm| MSFT X64/VmgExit.nasm | MSFT + X64/XGetBv.nasm | MSFT X64/Non-existing.c diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index 80bd5cf57a72..362bc2e05dbc 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -7893,6 +7893,22 @@ AsmVmgExit ( VOID ); +/** + Executes a XGETBV instruction + + Executes a XGETBV instruction. This function is only available on IA-32 and + x64. + + @param[in] Index Extended control register index + + @retval The current value of the extended control register +**/ +UINT64 +EFIAPI +AsmXGetBv ( + IN UINT32 Index + ); + /** Patch the immediate operand of an IA32 or X64 instruction such that the byte, diff --git a/MdePkg/Library/BaseLib/Ia32/GccInline.c b/MdePkg/Library/BaseLib/Ia32/GccInline.c index 55d2e12bcdc9..9db5e48d9899 100644 --- a/MdePkg/Library/BaseLib/Ia32/GccInline.c +++ b/MdePkg/Library/BaseLib/Ia32/GccInline.c @@ -1780,3 +1780,31 @@ AsmVmgExit ( } +/** + Executes a XGETBV instruction + + Executes a XGETBV instruction. This function is only available on IA-32 and + x64. + + @param[in] Index Extended control register index + + @retval The current value of the extended control register +**/ +UINT64 +EFIAPI +AsmXGetBv ( + IN UINT32 Index + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "xgetbv" + : "=A" (Data) + : "c" (Index) + ); + + return Data; +} + + diff --git a/MdePkg/Library/BaseLib/X64/GccInline.c b/MdePkg/Library/BaseLib/X64/GccInline.c index 17539caa0798..0169382978ac 100644 --- a/MdePkg/Library/BaseLib/X64/GccInline.c +++ b/MdePkg/Library/BaseLib/X64/GccInline.c @@ -1815,3 +1815,33 @@ AsmVmgExit ( } +/** + Executes a XGETBV instruction + + Executes a XGETBV instruction. This function is only available on IA-32 and + x64. + + @param[in] Index Extended control register index + + @retval The current value of the extended control register +**/ +UINT64 +EFIAPI +AsmXGetBv ( + IN UINT32 Index + ) +{ + UINT32 LowData; + UINT32 HighData; + + __asm__ __volatile__ ( + "xgetbv" + : "=a" (LowData), + "=d" (HighData) + : "c" (Index) + ); + + return (((UINT64)HighData) << 32) | LowData; +} + + diff --git a/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm b/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm new file mode 100644 index 000000000000..8d14ba03d4a8 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm @@ -0,0 +1,31 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2019, Advanced Micro Device, Inc. All rights reserved.<BR> +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; Module Name: +; +; XGetBv.Asm +; +; Abstract: +; +; AsmXgetBv function +; +; Notes: +; +;------------------------------------------------------------------------------ + + SECTION .text + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmXGetBv ( +; IN UINT32 Index +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(AsmXGetBv) +ASM_PFX(AsmXGetBv): + mov ecx, [esp + 4] + xgetbv + ret diff --git a/MdePkg/Library/BaseLib/X64/XGetBv.nasm b/MdePkg/Library/BaseLib/X64/XGetBv.nasm new file mode 100644 index 000000000000..239ecb58ab13 --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/XGetBv.nasm @@ -0,0 +1,34 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2019, Advanced Micro Device, Inc. All rights reserved.<BR> +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; Module Name: +; +; XGetBv.Asm +; +; Abstract: +; +; AsmXgetBv function +; +; Notes: +; +;------------------------------------------------------------------------------ + + DEFAULT REL + SECTION .text + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmXGetBv ( +; IN UINT32 Index +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(AsmXGetBv) +ASM_PFX(AsmXGetBv): + xgetbv + shl rdx, 0x20 + or rax, rdx + ret + -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47655): https://edk2.groups.io/g/devel/message/47655 Mute This Topic: https://groups.io/mt/34203557/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-