From: Tom Lendacky <[email protected]> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a RDTSC intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Cc: Eric Dong <[email protected]> Cc: Ray Ni <[email protected]> Cc: Laszlo Ersek <[email protected]> Signed-off-by: Tom Lendacky <[email protected]> --- .../X64/AMDSevVcCommon.c | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c index f8966cc3eca0..1f6a1f9a30ce 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c @@ -865,6 +865,32 @@ CpuidExit ( return 0; } +STATIC +UINTN +RdtscExit ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINTN Status; + + Status = VmgExit (Ghcb, SvmExitRdtsc, 0, 0); + if (Status) { + return Status; + } + + if (!GhcbIsRegValid (Ghcb, GhcbRax) || + !GhcbIsRegValid (Ghcb, GhcbRdx)) { + VmgExit (Ghcb, SvmExitUnsupported, SvmExitRdtsc, 0); + ASSERT (0); + } + Regs->Rax = Ghcb->SaveArea.Rax; + Regs->Rdx = Ghcb->SaveArea.Rdx; + + return 0; +} + UINTN DoVcCommon ( GHCB *Ghcb, @@ -881,6 +907,10 @@ DoVcCommon ( ExitCode = Regs->ExceptionData; switch (ExitCode) { + case SvmExitRdtsc: + NaeExit = RdtscExit; + break; + case SvmExitCpuid: NaeExit = CpuidExit; break; -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47660): https://edk2.groups.io/g/devel/message/47660 Mute This Topic: https://groups.io/mt/34203563/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
