On Wed, Jun 26, 2019 at 09:04:14AM +0200, Marcin Wojtas wrote:
> Ensure that in case of SlowMode or 3.3V operation,
> also the HS400 capability will be disabled in the
> SdMmc driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
Well done on keeping this tag. But I'm thinking we need to do that
relicensing sooner rather than later, and drop the tag.
However, can you clarify what problem this solves?
/
Leif
> Signed-off-by: Marcin Wojtas <[email protected]>
> ---
> Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h | 1 +
> Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c | 5 +++--
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
> b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
> index 8bf1835..2d7c7f0 100644
> --- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
> +++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h
> @@ -82,6 +82,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> #define SDHC_CAP_SDR50 BIT32
> #define SDHC_CAP_SDR104 BIT33
> #define SDHC_CAP_DDR50 BIT34
> +#define SDHC_CAP_HS400 BIT63
> #define SDHC_MAX_CURRENT_CAP 0x0048
> #define SDHC_FORCE_EVT_AUTO_CMD 0x0050
> #define SDHC_FORCE_EVT_ERR_INT 0x0052
> diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
> b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
> index 7a9266e..55ebcf8 100644
> --- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
> +++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c
> @@ -357,7 +357,8 @@ XenonSdMmcCapability (
> Capability &= ~(UINT64)(SDHC_CAP_VOLTAGE_33 | SDHC_CAP_VOLTAGE_30);
> } else {
> Capability &= ~(UINT64)(SDHC_CAP_SDR104 | SDHC_CAP_DDR50 |
> - SDHC_CAP_SDR50 | SDHC_CAP_VOLTAGE_18);
> + SDHC_CAP_SDR50 | SDHC_CAP_HS400 |
> + SDHC_CAP_VOLTAGE_18);
> }
>
> if (!SdMmcDesc.Xenon8BitBusEnabled) {
> @@ -365,7 +366,7 @@ XenonSdMmcCapability (
> }
>
> if (SdMmcDesc.XenonSlowModeEnabled) {
> - Capability &= ~(UINT64)(SDHC_CAP_SDR104 | SDHC_CAP_DDR50);
> + Capability &= ~(UINT64)(SDHC_CAP_SDR104 | SDHC_CAP_DDR50 |
> SDHC_CAP_HS400);
> }
>
> Capability &= ~(UINT64)(SDHC_CAP_SLOT_TYPE_MASK);
> --
> 2.7.4
>
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