In the MemMapInitialization() function, we currently have a common PciSize assignment, shared between i440fx and q35. In order to simplify the rest of this series, lift and duplicate the assignment identically to both board-specific branches.
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org> Cc: Gerd Hoffmann <kra...@redhat.com> Cc: Jordan Justen <jordan.l.jus...@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1666941 Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1701710 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <ler...@redhat.com> --- OvmfPkg/PlatformPei/Platform.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 0876316eefbc..5e0a15484230 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -190,8 +190,10 @@ MemMapInitialization ( ASSERT (TopOfLowRam <= PciExBarBase); ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB); PciBase = (UINT32)(PciExBarBase + SIZE_256MB); + PciSize = 0xFC000000 - PciBase; } else { PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam; + PciSize = 0xFC000000 - PciBase; } // @@ -207,7 +209,6 @@ MemMapInitialization ( // 0xFED20000 gap 896 KB // 0xFEE00000 LAPIC 1 MB // - PciSize = 0xFC000000 - PciBase; AddIoMemoryBaseSizeHob (PciBase, PciSize); PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase); ASSERT_RETURN_ERROR (PcdStatus); -- 2.19.1.3.g30247aa5d201 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#39966): https://edk2.groups.io/g/devel/message/39966 Mute This Topic: https://groups.io/mt/31489696/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
