Avoid access to MSR_IA32_APIC_BASE that may not be supported
on single core CPUs. If PcdCpuMaxLogicalProcessorNumber is 1,
then there is only one CPU that must be the BSP.
Cc: Eric Dong <eric.d...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Signed-off-by: Michael D Kinney <michael.d.kin...@intel.com>
---
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
index 35dff91fd2..5488049c08 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
@@ -1,7 +1,7 @@
/** @file
MP initialize support functions for PEI phase.
- Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -101,6 +101,19 @@ GetCpuMpData (
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
IA32_DESCRIPTOR Idtr;
+ //
+ // If there is only 1 CPU, then it must be the BSP. This avoids an access to
+ // MSR_IA32_APIC_BASE that may not be supported on single core CPUs.
+ //
+ if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) == 1) {
+ CpuMpData = GetCpuMpDataFromGuidedHob ();
+ ASSERT (CpuMpData != NULL);
+ return CpuMpData;
+ }
+
+ //
+ // Otherwise use MSR_IA32_APIC_BASE to determine if the CPU is BSP or AP.
+ //
ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
if (ApicBaseMsr.Bits.BSP == 1) {
CpuMpData = GetCpuMpDataFromGuidedHob ();
--
2.21.0.windows.1
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