> What I'm aiming at is to be able to lower the TIR to a generic CPU, that is > to an architecture that does not support SVE. The TIR will need to have some > default lowering in CodeGenLLVM/CodeGenCPU, so being able to do that is > important.
Could it instead be in a target-dependent lowering pass? That is, since a lowering pass after `BindTarget` ([here](https://github.com/apache/tvm/blob/main/src/driver/driver_api.cc#L573) in `driver_api.cc`) would know whether the target CPU supports SVE or not, we could make a pass that either returns the IRModule unmodified for CPUs that support SVE, or converts it to non-SVE instructions otherwise. I'd like to avoid adding more complexity to the `CodeGenLLVM` and `CodeGenCPU` steps, as it is more difficult to test than IRModule to IRModule transformations. -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm-rfcs/pull/104#issuecomment-1751100613 You are receiving this because you are subscribed to this thread. Message ID: <apache/tvm-rfcs/pull/104/c1751100...@github.com>
