Sorry for the delay... What I'm aiming at is to be able to lower the TIR to a generic CPU, that is to an architecture that does not support SVE. The TIR will need to have some default lowering in CodeGenLLVM/CodeGenCPU, so being able to do that is important. For that, we should be able to assume that `vscale` is 1. The `vscale` would simply be an indicator to the codegen (in TVM) that the code **may** be lowered to SVE.
What I wrote earlier about `vfactor` was that the value of it depended on the data type for which it was calculated. If you're sticking with `vscale`, then it may seem like we don't need it, but the issue is with using "x * vscale" as an idiom: if you have several occurrences of "4 * vscale" in an expression, it may end up being rearranged to something like "(4*vi + 4) * vscale", or "ceildiv(128, 4 * vscale)" may end up being "ceildiv(32, vscale)". So, instead of "x * vscale", I suggest "vscale(x)". -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm-rfcs/pull/104#issuecomment-1751038124 You are receiving this because you are subscribed to this thread. Message ID: <apache/tvm-rfcs/pull/104/c1751038...@github.com>
