Hello All, Following Gustavo instructions I was able to see it working several commits before master. I will open a github issue, maybe more people can look it and help us to solve.
Em qua., 28 de ago. de 2024 às 13:11, Felipe Moura Oliveira < moura....@gmail.com> escreveu: > Yes Alan. > > I started testing with 1 MHz and dropped the speed to check. > > > *are you sure that clock rising/falling edges are configured correctly for > mosi/miso read/write requirements? *Yes I check it properly. > > Em qua., 28 de ago. de 2024 às 12:48, Alan C. Assis <acas...@gmail.com> > escreveu: > >> Hi Tomek, >> >> As you can see in the signal wave screenshots, he is using 100Hz, which is >> already too slow for SPI. >> >> BR, >> >> Alan >> >> On Wed, Aug 28, 2024 at 12:15 PM Tomek CEDRO <to...@cedro.info> wrote: >> >> > are you sure that clock rising/falling edges are configured correctly >> for >> > mosi/miso read/write requirements? >> > >> > have you tried lowering the frequency to eliminate timing issues? >> > >> > -- >> > CeDeROM, SQ7MHZ, http://www.tomek.cedro.info >> > >> > > > -- > *Felipe Moura de Oliveira* > *Universidade Federal de Minas Gerais* > Linkedin <https://www.linkedin.com/in/felipe-oliveira-75a651a0> > <https://twitter.com/FelipeMOliveir?lang=pt-br> > -- *Felipe Moura de Oliveira* *Universidade Federal de Minas Gerais* Linkedin <https://www.linkedin.com/in/felipe-oliveira-75a651a0> <https://twitter.com/FelipeMOliveir?lang=pt-br>
