-----Original Message-----
From: Sexton, Rory
Sent: Sunday, December 4, 2016 9:55 PM
To: Wu, Jingjing <jingjing...@intel.com>
Cc: dev@dpdk.org; Marjanovic, Nemanja <nemanja.marjano...@intel.com>; Mcnamara,
John <john.mcnam...@intel.com>; Sexton, Rory <rory.sex...@intel.com>
Subject: [PATCH v1] net/i40e: set no drop for traffic class
From: John McNamara <john.mcnam...@intel.com>
The default traffic class in i40e is set to drop versus on ixgbe it isset to no
drop. This means when packets build up in the RX SRAM on the NIC, they are
dropped, and they do this when the SW descriptor rings fill up.
This patch changes this behaviour and our testing shows there are no drops as a
result.
Signed-off-by: Rory Sexton <rory.sex...@intel.com>
Signed-off-by: Nemanja Marjanovic <nemanja.marjano...@intel.com>
---
drivers/net/i40e/i40e_ethdev.c | 1 +
drivers/net/i40e/i40e_rxtx.c | 12 ++++++++++++
drivers/net/i40e/i40e_rxtx.h | 1 +
lib/librte_ether/rte_ethdev.h | 24 ++++++++++++++++++++++++
4 files changed, 38 insertions(+)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 67778ba..9702acb 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -553,6 +553,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.get_eeprom = i40e_get_eeprom,
.mac_addr_set = i40e_set_default_mac_addr,
.mtu_set = i40e_dev_mtu_set,
+ .set_no_drop = i40e_set_no_drop,
};
/* store statistics names and its offset in stats structure */ diff --git
a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index
7ae7d9f..02aeff4 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -783,6 +783,18 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
return nb_rx;
}
+uint32_t
+i40e_set_no_drop(struct rte_eth_dev *dev, uint16_t rx_queue_id) {
+ struct i40e_rx_queue *rxq = dev->data->rx_queues[rx_queue_id];
+ struct i40e_hw *hw = I40E_VSI_TO_HW(rxq->vsi);
+
+ /* Set No Drop Traffic Class. */
+ I40E_WRITE_REG(hw, 0x1c0980, 0xff);
+
+ return 1;
+}
0x1c0980 is the register (PRTDCB_TC2PFC) which is used to control pfc for each
TC.
We already have ETH_DCB_PFC_SUPPORT flag in rte_eth_conf.dcb_capability_en to
Control if PFC is enabled. And rte_eth_dcb_rx_conf.nb_tcs identified number of
TCs
It supports.
"I40E_WRITE_REG(hw, 0x1c0980, 0xff);" can be achieved by enabling DCB and PFC
For all TCs.
Why do we need such a new API?
Thanks
Jingjing
