> -----Original Message-----
> From: Tao, Zhe
> Sent: Thursday, January 28, 2016 3:03 PM
> To: Wu, Jingjing
> Cc: dev at dpdk.org
> Subject: RE: [dpdk-dev] [PATCH v2 2/2] i40evf: support interrupt based pf
> reset request
> 
> > @@ -74,8 +74,6 @@
> > +static void
> > @@ -1662,7 +1869,8 @@ (struct rte_eth_dev
> > *dev)
> >             I40E_WRITE_REG(hw,
> >                            I40E_VFINT_DYN_CTL01,
> >                            I40E_VFINT_DYN_CTL01_INTENA_MASK |
> > -                          I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
> > +                          I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
> > +                          I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
> What the usage for ITR bits here?
According to the access type of register I40E_VFINT_DYN_CTL01, the ITR_INDX_MASK
here means don't update the ITR index.
> >             I40EVF_WRITE_FLUSH(hw);
> >             return;
> >     }

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