On Tue, Jun 30, 2026 at 08:06:53AM -0400, Dawid Wesierski wrote: > From: Marek Kasiewicz <[email protected]> > > The E810 Tx scheduler uses a token bucket algorithm where the burst > size controls the maximum bytes sent in a single burst before the > rate limiter throttles. The hardware default of 15 KB allows > micro-bursts of ~10 max-size frames, which violates tight > inter-packet spacing requirements in time-sensitive networking > applications such as SMPTE ST 2110-21 narrow-sender compliance. > > Add a "rl_burst_size" device argument that lets the application lower > the scheduler rate-limiter burst size (for example to 2 KB) to force > near-constant-rate output matching the configured shaper profile. > The burst size is a global scheduler resource, so the override is > applied once at probe time and only when the user explicitly requests > it; the hardware default is left unchanged otherwise. > > Signed-off-by: Marek Kasiewicz <[email protected]> > Signed-off-by: Dawid Wesierski <[email protected]> > ---
Acked-by: Bruce Richardson <[email protected]> However, one issue flagged below that needs resolution before merge. > doc/guides/nics/ice.rst | 12 +++++++ > doc/guides/rel_notes/release_26_07.rst | 5 +++ > drivers/net/intel/ice/ice_ethdev.c | 46 ++++++++++++++++++++++++++ > drivers/net/intel/ice/ice_ethdev.h | 1 + > 4 files changed, 64 insertions(+) > > diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst > index 8251416918..187c7e821f 100644 > --- a/doc/guides/nics/ice.rst > +++ b/doc/guides/nics/ice.rst > @@ -158,6 +158,18 @@ Runtime Configuration > > -a 80:00.0,source-prune=1 > > +- ``Scheduler rate-limiter burst size`` (default ``0``) > + > + The hardware Tx scheduler uses a default rate-limiter burst size that > favours > + throughput. Time-sensitive applications can lower this value to reduce Tx > + latency jitter at the cost of throughput by setting the ``rl_burst_size`` > + devargs parameter, in bytes. The value is clamped to the hardware-allowed > + range. A value of ``0`` (the default) keeps the hardware default. The documentation here is wrong, in that values are not clamped, but are instead rejected if they are out of range. ICE_INIT: ice_dev_init(): Invalid rl_burst_size 2097152 bytes testpmd: No probed ethernet devices If you like, I can update the docs on apply to remove this clamping reference. Alternatively, if you do want to clamp the values, please respin this patchset. If you do, you can keep my ack on the new version. > + > + For example:: > + > + -a 80:00.0,rl_burst_size=2048 > + > - ``Protocol extraction for per queue`` > > Configure the RX queues to do protocol extraction into mbuf for protocol > diff --git a/doc/guides/rel_notes/release_26_07.rst > b/doc/guides/rel_notes/release_26_07.rst > index 5d7aa8d1bf..db8c4d5b16 100644 > --- a/doc/guides/rel_notes/release_26_07.rst > +++ b/doc/guides/rel_notes/release_26_07.rst > @@ -136,6 +136,11 @@ New Features > * Added support for transmitting LLDP packets based on mbuf packet type. > * Implemented AVX2 context descriptor transmit paths. > > +* **Updated Intel ice driver.** > + > + * Added ``rl_burst_size`` devarg to configure the scheduler rate-limiter > + burst size, reducing Tx latency jitter for time-sensitive traffic. > + > * **Updated NVIDIA mlx5 ethernet driver.** > > * Added support for selective Rx in scalar SPRQ Rx path. > diff --git a/drivers/net/intel/ice/ice_ethdev.c > b/drivers/net/intel/ice/ice_ethdev.c > index ad9c49b339..465cf07383 100644 > --- a/drivers/net/intel/ice/ice_ethdev.c > +++ b/drivers/net/intel/ice/ice_ethdev.c > @@ -41,6 +41,7 @@ > #define ICE_DDP_FILENAME_ARG "ddp_pkg_file" > #define ICE_DDP_LOAD_SCHED_ARG "ddp_load_sched_topo" > #define ICE_TM_LEVELS_ARG "tm_sched_levels" > +#define ICE_RL_BURST_SIZE_ARG "rl_burst_size" > #define ICE_SOURCE_PRUNE_ARG "source-prune" > #define ICE_LINK_STATE_ON_CLOSE "link_state_on_close" > > @@ -59,6 +60,7 @@ static const char * const ice_valid_args[] = { > ICE_DDP_FILENAME_ARG, > ICE_DDP_LOAD_SCHED_ARG, > ICE_TM_LEVELS_ARG, > + ICE_RL_BURST_SIZE_ARG, > ICE_SOURCE_PRUNE_ARG, > ICE_LINK_STATE_ON_CLOSE, > NULL > @@ -2147,6 +2149,29 @@ parse_u64(const char *key, const char *value, void > *args) > return 0; > } > > +static int > +parse_u32(const char *key, const char *value, void *args) > +{ > + uint32_t *num = args; > + unsigned long tmp; > + char *endptr; > + > + errno = 0; > + tmp = strtoul(value, &endptr, 0); > + if (errno != 0 || endptr == value || *endptr != '\0') { > + PMD_DRV_LOG(WARNING, "%s: \"%s\" is not a valid u32", key, > value); > + return -1; > + } > + if (tmp > UINT32_MAX) { > + PMD_DRV_LOG(WARNING, "%s: value \"%s\" is out of range", key, > value); > + return -1; > + } > + > + *num = (uint32_t)tmp; > + > + return 0; > +} > + > static int > parse_tx_sched_levels(const char *key, const char *value, void *args) > { > @@ -2448,6 +2473,11 @@ static int ice_parse_devargs(struct rte_eth_dev *dev) > if (ret) > goto bail; > > + ret = rte_kvargs_process(kvlist, ICE_RL_BURST_SIZE_ARG, > + &parse_u32, &ad->devargs.rl_burst_size); > + if (ret) > + goto bail; > + > ret = rte_kvargs_process(kvlist, ICE_SOURCE_PRUNE_ARG, > &parse_bool, &ad->devargs.source_prune); > if (ret) > @@ -2662,6 +2692,21 @@ ice_dev_init(struct rte_eth_dev *dev) > return -EINVAL; > } > > + /* > + * Override the hardware default scheduler rate-limiter burst size only > + * when the user explicitly requests it. A smaller burst reduces Tx > + * latency jitter for time-sensitive traffic at the cost of throughput, > + * so it must not change for every port. ice_cfg_rl_burst_size() > + * validates the value against the hardware-allowed range. > + */ > + if (ad->devargs.rl_burst_size != 0 && > + ice_cfg_rl_burst_size(hw, ad->devargs.rl_burst_size) != 0) { > + PMD_INIT_LOG(ERR, "Invalid rl_burst_size %u bytes", > + ad->devargs.rl_burst_size); > + ice_deinit_hw(hw); > + return -EINVAL; > + } > + > #ifndef RTE_EXEC_ENV_WINDOWS > use_dsn = false; > dsn = 0; > @@ -7713,6 +7758,7 @@ RTE_PMD_REGISTER_PARAM_STRING(net_ice, > ICE_DDP_FILENAME_ARG "=</path/to/file>" > ICE_DDP_LOAD_SCHED_ARG "=<0|1>" > ICE_TM_LEVELS_ARG "=<N>" > + ICE_RL_BURST_SIZE_ARG "=<N>" > ICE_SOURCE_PRUNE_ARG "=<0|1>" > ICE_RX_LOW_LATENCY_ARG "=<0|1>" > ICE_LINK_STATE_ON_CLOSE "=<down|up|initial>"); > diff --git a/drivers/net/intel/ice/ice_ethdev.h > b/drivers/net/intel/ice/ice_ethdev.h > index 20e8a13fe9..0a9d75b9cd 100644 > --- a/drivers/net/intel/ice/ice_ethdev.h > +++ b/drivers/net/intel/ice/ice_ethdev.h > @@ -631,6 +631,7 @@ struct ice_devargs { > uint8_t ddp_load_sched; > uint8_t tm_exposed_levels; > uint8_t source_prune; > + uint32_t rl_burst_size; > int link_state_on_close; > int xtr_field_offs; > uint8_t xtr_flag_offs[PROTO_XTR_MAX]; > -- > 2.47.3 > > --------------------------------------------------------------------- > Intel Technology Poland sp. z o.o. > ul. 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