From: Kalesh AP <[email protected]>
The Rx/Tx timestamp will now be made available using the HWRM cmd
PORT_TS_QUERY on BCM57414 chips.
Get rid of the earlier code that was fetching this using register
access.
Fixes: b11cceb83a34 ("net/bnxt: support timesync")
Cc: [email protected]
Signed-off-by: Kalesh AP <[email protected]>
Signed-off-by: Mohammad Shuab Siddique <[email protected]>
---
drivers/net/bnxt/bnxt_ethdev.c | 109 +--------------------------------
drivers/net/bnxt/bnxt_rxr.c | 17 ++++-
2 files changed, 19 insertions(+), 107 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 14d8fa705d..64b12ada9f 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -3754,99 +3754,6 @@ bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev,
return ptypes;
}
-static uint64_t bnxt_cc_read(struct bnxt *bp)
-{
- uint64_t ns;
-
- ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- BNXT_GRCPF_REG_SYNC_TIME));
- ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
- return ns;
-}
-
-static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
-{
- struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
- uint32_t fifo;
-
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
- if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
- return -EAGAIN;
-
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
- *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
- *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
- rte_read32((uint8_t *)bp->bar0 + ptp->tx_mapped_regs[BNXT_PTP_TX_SEQ]);
-
- return 0;
-}
-
-static int bnxt_clr_rx_ts(struct bnxt *bp, uint64_t *last_ts)
-{
- struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
- struct bnxt_pf_info *pf = bp->pf;
- uint16_t port_id;
- int i = 0;
- uint32_t fifo;
-
- if (!ptp || (bp->flags & BNXT_FLAG_CHIP_P5))
- return -EINVAL;
-
- port_id = pf->port_id;
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
- while ((fifo & BNXT_PTP_RX_FIFO_PENDING) && (i < BNXT_PTP_RX_PND_CNT)) {
- rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]);
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
- *last_ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
- *last_ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t
*)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H]))
<< 32;
- i++;
- }
-
- if (i >= BNXT_PTP_RX_PND_CNT)
- return -EBUSY;
-
- return 0;
-}
-
-static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
-{
- struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
- struct bnxt_pf_info *pf = bp->pf;
- uint16_t port_id;
- uint32_t fifo;
-
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
- if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
- return -EAGAIN;
-
- port_id = pf->port_id;
- rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]);
-
- fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
- if (fifo & BNXT_PTP_RX_FIFO_PENDING)
- return bnxt_clr_rx_ts(bp, ts);
-
- *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
- *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
- ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
-
- return 0;
-}
-
static int
bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
{
@@ -3877,12 +3784,9 @@ bnxt_timesync_read_time(struct rte_eth_dev *dev, struct
timespec *ts)
if (!ptp)
return -ENOTSUP;
- /* TODO Revisit for Thor 2 */
if (BNXT_CHIP_P5(bp))
rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
&systime_cycles);
- else
- systime_cycles = bnxt_cc_read(bp);
ns = rte_timecounter_update(&ptp->tc, systime_cycles);
*ts = rte_ns_to_timespec(ns);
@@ -3965,11 +3869,7 @@ bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
if (!ptp)
return -ENOTSUP;
- /* TODO Revisit for Thor 2 */
- if (BNXT_CHIP_P5(bp))
- rx_tstamp_cycles = ptp->rx_timestamp;
- else
- bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
+ rx_tstamp_cycles = ptp->rx_timestamp;
ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
*timestamp = rte_ns_to_timespec(ns);
@@ -3990,11 +3890,8 @@ bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
return -ENOTSUP;
/* TODO Revisit for Thor 2 */
- if (BNXT_CHIP_P5(bp))
- rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_PATH_TX,
- &tx_tstamp_cycles);
- else
- rc = bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
+ rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_PATH_TX,
+ &tx_tstamp_cycles);
ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
*timestamp = rte_ns_to_timespec(ns);
diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c
index 73fee40401..fb7c70fd45 100644
--- a/drivers/net/bnxt/bnxt_rxr.c
+++ b/drivers/net/bnxt/bnxt_rxr.c
@@ -727,6 +727,18 @@ bnxt_set_ol_flags(struct bnxt_rx_ring_info *rxr, struct
rx_pkt_cmpl *rxcmp,
mbuf->ol_flags |= ol_flags;
}
+static void bnxt_get_rx_ts(struct bnxt *bp)
+{
+ struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
+
+ if (!ptp)
+ return;
+
+ rte_spinlock_lock(&ptp->ptp_lock);
+ ptp->rx_timestamp = ptp->old_time;
+ rte_spinlock_unlock(&ptp->ptp_lock);
+}
+
static void
bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
{
@@ -1198,7 +1210,10 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
bp->ptp_cfg) {
mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
RTE_MBUF_F_RX_IEEE1588_TMST;
- bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
+ if (BNXT_CHIP_P5(bp))
+ bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
+ else
+ bnxt_get_rx_ts(rxq->bp);
#ifndef RTE_IOVA_IN_MBUF
bnxt_timestamp_dynfield_set(mbuf,
bp->ptp_cfg->mb_rx_timestamp_offset,
--
2.47.3
