On Tue, Mar 18, 2025 at 6:36 PM Bruce Richardson
<bruce.richard...@intel.com> wrote:
>
> All DPDK-supported versions of clang and gcc have the "-mpclmul" and
> "-maes" flags, so we never need to check for those. This allows the SSE
> code path to be unconditionally built on x86.
>
> For the AVX512 code path, simplify it by only checking for the
> build-time support, and always doing a separate build with AVX512
> support when that compiler support is present.
>
> Signed-off-by: Bruce Richardson <bruce.richard...@intel.com>
> ---
> lib/net/meson.build | 53 +++++--------------------------------------
> lib/net/rte_net_crc.c | 8 +++----
> 2 files changed, 10 insertions(+), 51 deletions(-)
>
> diff --git a/lib/net/meson.build b/lib/net/meson.build
> index c9b34afc98..4bbbad3f42 100644
> --- a/lib/net/meson.build
> +++ b/lib/net/meson.build
> @@ -42,57 +42,16 @@ deps += ['mbuf']
> use_function_versioning = true
>
> if dpdk_conf.has('RTE_ARCH_X86_64')
> - net_crc_sse42_cpu_support = (cc.get_define('__PCLMUL__', args:
> machine_args) != '')
> - net_crc_avx512_cpu_support = (
> - target_has_avx512 and
> - cc.get_define('__VPCLMULQDQ__', args: machine_args) != ''
> - )
> -
> - net_crc_sse42_cc_support = (cc.has_argument('-mpclmul') and
> cc.has_argument('-maes'))
> - net_crc_avx512_cc_support = (cc.has_argument('-mvpclmulqdq') and
> cc_has_avx512)
> -
> - build_static_net_crc_sse42_lib = 0
> - build_static_net_crc_avx512_lib = 0
> -
> - if net_crc_sse42_cpu_support == true
> - sources += files('net_crc_sse.c')
> - cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
> - if net_crc_avx512_cpu_support == true
> - sources += files('net_crc_avx512.c')
> - cflags += ['-DCC_X86_64_AVX512_VPCLMULQDQ_SUPPORT']
> - elif net_crc_avx512_cc_support == true
> - build_static_net_crc_avx512_lib = 1
> - net_crc_avx512_lib_cflags = cc_avx512_flags + ['-mvpclmulqdq']
> - cflags += ['-DCC_X86_64_AVX512_VPCLMULQDQ_SUPPORT']
> - endif
> - elif net_crc_sse42_cc_support == true
> - build_static_net_crc_sse42_lib = 1
> - net_crc_sse42_lib_cflags = ['-mpclmul', '-maes']
> - cflags += ['-DCC_X86_64_SSE42_PCLMULQDQ_SUPPORT']
> - if net_crc_avx512_cc_support == true
> - build_static_net_crc_avx512_lib = 1
> - net_crc_avx512_lib_cflags = cc_avx512_flags + ['-mvpclmulqdq',
> '-mpclmul']
> - cflags += ['-DCC_X86_64_AVX512_VPCLMULQDQ_SUPPORT']
> - endif
> - endif
> -
> - if build_static_net_crc_sse42_lib == 1
> - net_crc_sse42_lib = static_library(
> - 'net_crc_sse42_lib',
> - 'net_crc_sse.c',
> - dependencies: static_rte_eal,
> - c_args: [cflags,
> - net_crc_sse42_lib_cflags])
> - objs += net_crc_sse42_lib.extract_objects('net_crc_sse.c')
> - endif
> -
> - if build_static_net_crc_avx512_lib == 1
> + sources += files('net_crc_sse.c')
> + cflags += ['-mpclmul', '-maes']
> + if cc.has_argument('-mvpclmulqdq') and cc_has_avx512
> + net_crc_avx512_lib_cflags = cc_avx512_flags + ['-mvpclmulqdq']
Nit: we don't need this intermediate variable. But well, it gets
removed in next patch.
> + cflags += ['-DCC_X86_64_AVX512_VPCLMULQDQ_SUPPORT']
> net_crc_avx512_lib = static_library(
> 'net_crc_avx512_lib',
> 'net_crc_avx512.c',
> dependencies: static_rte_eal,
> - c_args: [cflags,
> - net_crc_avx512_lib_cflags])
> + c_args: [cflags, net_crc_avx512_lib_cflags])
> objs += net_crc_avx512_lib.extract_objects('net_crc_avx512.c')
> endif
>
> diff --git a/lib/net/rte_net_crc.c b/lib/net/rte_net_crc.c
> index 2fb3eec231..c9773d6300 100644
> --- a/lib/net/rte_net_crc.c
> +++ b/lib/net/rte_net_crc.c
> @@ -66,7 +66,7 @@ static const rte_net_crc_handler handlers_avx512[] = {
> [RTE_NET_CRC32_ETH] = rte_crc32_eth_avx512_handler,
> };
> #endif
> -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> +#ifdef RTE_ARCH_X86_64
> static const rte_net_crc_handler handlers_sse42[] = {
> [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_sse42_handler,
> [RTE_NET_CRC32_ETH] = rte_crc32_eth_sse42_handler,
> @@ -211,7 +211,7 @@ avx512_vpclmulqdq_init(void)
> static const rte_net_crc_handler *
> sse42_pclmulqdq_get_handlers(void)
> {
> -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> +#ifdef RTE_ARCH_X86_64
> if (SSE42_PCLMULQDQ_CPU_SUPPORTED &&
> max_simd_bitwidth >= RTE_VECT_SIMD_128)
> return handlers_sse42;
> @@ -223,7 +223,7 @@ sse42_pclmulqdq_get_handlers(void)
> static void
> sse42_pclmulqdq_init(void)
> {
> -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> +#ifdef RTE_ARCH_x86_64
> if (SSE42_PCLMULQDQ_CPU_SUPPORTED)
> rte_net_crc_sse42_init();
> #endif
> @@ -316,7 +316,7 @@ handlers_init(enum rte_net_crc_alg alg)
> #endif
> /* fall-through */
> case RTE_NET_CRC_SSE42:
> -#ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
> +#ifdef RTE_ARCH_X86_64
> if (SSE42_PCLMULQDQ_CPU_SUPPORTED) {
> handlers_dpdk26[alg].f[RTE_NET_CRC16_CCITT] =
> rte_crc16_ccitt_sse42_handler;
> --
> 2.43.0
>
--
David Marchand
