Use the common support for AVX512 code present in lib/meson.build,
rather than hard-coding it. The only complication is an extra check for
the "-mvpclmulqdq" command-line flag before adding the AVX512 sources.

Signed-off-by: Bruce Richardson <bruce.richard...@intel.com>
---
 lib/net/meson.build   | 13 ++++---------
 lib/net/rte_net_crc.c |  8 ++++----
 2 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/lib/net/meson.build b/lib/net/meson.build
index 4bbbad3f42..7a6c419f40 100644
--- a/lib/net/meson.build
+++ b/lib/net/meson.build
@@ -44,15 +44,10 @@ use_function_versioning = true
 if dpdk_conf.has('RTE_ARCH_X86_64')
     sources += files('net_crc_sse.c')
     cflags += ['-mpclmul', '-maes']
-    if cc.has_argument('-mvpclmulqdq') and cc_has_avx512
-        net_crc_avx512_lib_cflags = cc_avx512_flags + ['-mvpclmulqdq']
-        cflags += ['-DCC_X86_64_AVX512_VPCLMULQDQ_SUPPORT']
-        net_crc_avx512_lib = static_library(
-                'net_crc_avx512_lib',
-                'net_crc_avx512.c',
-                dependencies: static_rte_eal,
-                c_args: [cflags, net_crc_avx512_lib_cflags])
-        objs += net_crc_avx512_lib.extract_objects('net_crc_avx512.c')
+    # only build AVX-512 support if we also have PCLMULQDQ support
+    if cc.has_argument('-mvpclmulqdq')
+        sources_avx512 += files('net_crc_avx512.c')
+        cflags_avx512 += ['-mvpclmulqdq']
     endif
 
 elif (dpdk_conf.has('RTE_ARCH_ARM64') and
diff --git a/lib/net/rte_net_crc.c b/lib/net/rte_net_crc.c
index c9773d6300..24ec267fc8 100644
--- a/lib/net/rte_net_crc.c
+++ b/lib/net/rte_net_crc.c
@@ -60,7 +60,7 @@ static const rte_net_crc_handler handlers_scalar[] = {
        [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_handler,
        [RTE_NET_CRC32_ETH] = rte_crc32_eth_handler,
 };
-#ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT
+#ifdef CC_AVX512_SUPPORT
 static const rte_net_crc_handler handlers_avx512[] = {
        [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_avx512_handler,
        [RTE_NET_CRC32_ETH] = rte_crc32_eth_avx512_handler,
@@ -185,7 +185,7 @@ rte_crc32_eth_handler(const uint8_t *data, uint32_t 
data_len)
 static const rte_net_crc_handler *
 avx512_vpclmulqdq_get_handlers(void)
 {
-#ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT
+#ifdef CC_AVX512_SUPPORT
        if (AVX512_VPCLMULQDQ_CPU_SUPPORTED &&
                        max_simd_bitwidth >= RTE_VECT_SIMD_512)
                return handlers_avx512;
@@ -197,7 +197,7 @@ avx512_vpclmulqdq_get_handlers(void)
 static void
 avx512_vpclmulqdq_init(void)
 {
-#ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT
+#ifdef CC_AVX512_SUPPORT
        if (AVX512_VPCLMULQDQ_CPU_SUPPORTED)
                rte_net_crc_avx512_init();
 #endif
@@ -305,7 +305,7 @@ handlers_init(enum rte_net_crc_alg alg)
 
        switch (alg) {
        case RTE_NET_CRC_AVX512:
-#ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT
+#ifdef CC_AVX512_SUPPORT
                if (AVX512_VPCLMULQDQ_CPU_SUPPORTED) {
                        handlers_dpdk26[alg].f[RTE_NET_CRC16_CCITT] =
                                rte_crc16_ccitt_avx512_handler;
-- 
2.43.0

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