From: Danylo Vodopianov <dvo-...@napatech.com>
Add NIM reset and low power functions with presence check
- Implement nim_set_reset function to handle NIM reset.
- Implement set_nim_low_power function to manage
NIM power state.
- Add code to check NIM presence before performing reset.
Signed-off-by: Danylo Vodopianov <dvo-...@napatech.com>
---
.../link_agx_100g/nt4ga_agx_link_100g.c | 53 +++++++++++++++++++
.../ntnic/nthw/core/include/nthw_pcal6416a.h | 1 +
drivers/net/ntnic/nthw/core/nthw_pcal6416a.c | 39 ++++++++++++++
3 files changed, 93 insertions(+)
diff --git a/drivers/net/ntnic/link_mgmt/link_agx_100g/nt4ga_agx_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_agx_100g/nt4ga_agx_link_100g.c
index fe2acef612..9193f21f6f 100644
--- a/drivers/net/ntnic/link_mgmt/link_agx_100g/nt4ga_agx_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_agx_100g/nt4ga_agx_link_100g.c
@@ -201,6 +201,17 @@ static int phy_set_line_loopback(adapter_info_t *drv, int
port, loopback_line_t
* Nim handling
*/
+static void nim_set_reset(struct nim_i2c_ctx *ctx, uint8_t nim_idx, bool reset)
+{
+ nthw_pcal6416a_t *p = ctx->hwagx.p_io_nim;
+
+ if (nim_idx == 0)
+ nthw_pcal6416a_write(p, 0, reset ? 0 : 1);
+
+ else if (nim_idx == 1)
+ nthw_pcal6416a_write(p, 4, reset ? 0 : 1);
+}
+
static bool nim_is_present(nim_i2c_ctx_p ctx, uint8_t nim_idx)
{
assert(nim_idx < NUM_ADAPTER_PORTS_MAX);
@@ -217,6 +228,20 @@ static bool nim_is_present(nim_i2c_ctx_p ctx, uint8_t
nim_idx)
return data == 0;
}
+static void set_nim_low_power(nim_i2c_ctx_p ctx, uint8_t nim_idx, bool
low_power)
+{
+ nthw_pcal6416a_t *p = ctx->hwagx.p_io_nim;
+
+ if (nim_idx == 0) {
+ /* De-asserting LP mode pin 1 */
+ nthw_pcal6416a_write(p, 1, low_power ? 1 : 0);
+
+ } else if (nim_idx == 1) {
+ /* De-asserting LP mode pin 5 */
+ nthw_pcal6416a_write(p, 5, low_power ? 1 : 0);
+ }
+}
+
/*
* Utility functions
*/
@@ -335,6 +360,25 @@ static int create_nim(adapter_info_t *drv, int port, bool
enable)
phy_reset_tx(drv, port);
}
+ /*
+ * Check NIM is present before doing reset.
+ */
+
+ if (!nim_is_present(nim_ctx, port)) {
+ NT_LOG(DBG, NTNIC, "%s: NIM module is no longer absent!",
+ drv->mp_port_id_str[port]);
+ return -1;
+ }
+
+ /*
+ * Reset NIM
+ */
+
+ NT_LOG(DBG, NTNIC, "%s: Performing NIM reset",
drv->mp_port_id_str[port]);
+ nim_set_reset(nim_ctx, (uint8_t)port, true);
+ nt_os_wait_usec(100000);/* pause 0.1s */
+ nim_set_reset(nim_ctx, (uint8_t)port, false);
+
/*
* Wait a little after a module has been inserted before trying to
access I2C
* data, otherwise the module will not respond correctly.
@@ -369,6 +413,15 @@ static int create_nim(adapter_info_t *drv, int port, bool
enable)
return -1;
}
+ if (enable) {
+ NT_LOG(DBG, NTNIC, "%s: De-asserting low power",
drv->mp_port_id_str[port]);
+ set_nim_low_power(nim_ctx, port, false);
+
+ } else {
+ NT_LOG(DBG, NTNIC, "%s: Asserting low power",
drv->mp_port_id_str[port]);
+ set_nim_low_power(nim_ctx, port, true);
+ }
+
return res;
}
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_pcal6416a.h
b/drivers/net/ntnic/nthw/core/include/nthw_pcal6416a.h
index 5ef14a0bc9..a718b59a29 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_pcal6416a.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_pcal6416a.h
@@ -24,6 +24,7 @@ struct nthw_pcal6416a {
typedef struct nthw_pcal6416a nthw_pcal6416a_t;
+void nthw_pcal6416a_write(nthw_pcal6416a_t *p, uint8_t pin, uint8_t value);
void nthw_pcal6416a_read(nthw_pcal6416a_t *p, uint8_t pin, uint8_t *value);
#endif /* __NTHW_PCAL6416A_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nthw_pcal6416a.c
b/drivers/net/ntnic/nthw/core/nthw_pcal6416a.c
index 37b6e7ec57..dd803ac66d 100644
--- a/drivers/net/ntnic/nthw/core/nthw_pcal6416a.c
+++ b/drivers/net/ntnic/nthw/core/nthw_pcal6416a.c
@@ -13,11 +13,50 @@
#include "nthw_pcal6416a.h"
static const uint8_t read_port[2] = { 0x00, 0x01 };
+static const uint8_t write_port[2] = { 0x02, 0x03 };
+static const uint8_t config_port[2] = { 0x06, 0x07 };
/*
* PCAL6416A I/O expander class
*/
+void nthw_pcal6416a_write(nthw_pcal6416a_t *p, uint8_t pin, uint8_t value)
+{
+ uint8_t port;
+ uint8_t data;
+
+ rte_spinlock_lock(&p->mp_nt_i2cm->i2cmmutex);
+ nthw_pca9849_set_channel(p->mp_ca9849, p->m_mux_channel);
+
+ if (pin < 8) {
+ port = 0;
+
+ } else {
+ port = 1;
+ pin = (uint8_t)(pin - 8);
+ }
+
+ nthw_i2cm_read(p->mp_nt_i2cm, p->m_dev_address, write_port[port],
&data);
+
+ if (value == 0)
+ data = (uint8_t)(data & (~(uint8_t)(1 << pin)));
+
+ else
+ data = (uint8_t)(data | (1 << pin));
+
+ nthw_i2cm_write(p->mp_nt_i2cm, p->m_dev_address, write_port[port],
data);
+
+ /* Enable pin as output pin when writing to it first time */
+ data = (uint8_t)(p->m_config_data[port] & (~(uint8_t)(1 << pin)));
+
+ if (data != p->m_config_data[port]) {
+ nthw_i2cm_write(p->mp_nt_i2cm, p->m_dev_address,
config_port[port], data);
+ p->m_config_data[port] = data;
+ }
+
+ rte_spinlock_unlock(&p->mp_nt_i2cm->i2cmmutex);
+}
+
void nthw_pcal6416a_read(nthw_pcal6416a_t *p, uint8_t pin, uint8_t *value)
{
uint8_t port;
--
2.45.0
