Initialize FPGA reset module and register fields.

Signed-off-by: Serhii Iliushyk <sil-...@napatech.com>
---
 .../core/nt400dxx/reset/nthw_fpga_rst9574.c   | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9574.c 
b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9574.c
index 9ab26583df..bd38d6b8c8 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9574.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9574.c
@@ -14,6 +14,60 @@ static int nthw_fpga_rst9574_setup(nthw_fpga_t *p_fpga, 
struct nthw_fpga_rst_nt4
        assert(p_fpga);
        assert(p);
 
+       const char *const p_adapter_id_str = 
p_fpga->p_fpga_info->mp_adapter_id_str;
+       const int n_fpga_product_id = p_fpga->mn_product_id;
+       const int n_fpga_version = p_fpga->mn_fpga_version;
+       const int n_fpga_revision = p_fpga->mn_fpga_revision;
+
+       nthw_module_t *p_mod_rst;
+       nthw_register_t *p_curr_reg;
+
+       p->n_fpga_product_id = n_fpga_product_id;
+       p->n_fpga_version = n_fpga_version;
+       p->n_fpga_revision = n_fpga_revision;
+
+       NT_LOG(DBG, NTHW, "%s: %s: FPGA reset setup: FPGA %04d-%02d-%02d", 
p_adapter_id_str,
+               __func__, n_fpga_product_id, n_fpga_version, n_fpga_revision);
+
+       p_mod_rst = nthw_fpga_query_module(p_fpga, MOD_RST9574, 0);
+
+       if (p_mod_rst == NULL) {
+               NT_LOG(ERR, NTHW, "%s: RST %d: no such instance", 
p_adapter_id_str, 0);
+               return -1;
+       }
+
+       p_mod_rst = nthw_fpga_query_module(p_fpga, MOD_RST9574, 0);
+
+       if (p_mod_rst == NULL) {
+               NT_LOG(ERR, NTHW, "%s: RST %d: no such instance", 
p_adapter_id_str, 0);
+               return -1;
+       }
+
+       /* RST register field pointers */
+       p_curr_reg = nthw_module_get_register(p_mod_rst, RST9574_RST);
+       p->p_fld_rst_sys = nthw_register_get_field(p_curr_reg, RST9574_RST_SYS);
+       p->p_fld_rst_ddr4 = nthw_register_get_field(p_curr_reg, 
RST9574_RST_DDR4);
+       p->p_fld_rst_phy_ftile = nthw_register_get_field(p_curr_reg, 
RST9574_RST_PHY_FTILE);
+       nthw_register_update(p_curr_reg);
+
+       p_curr_reg = nthw_module_get_register(p_mod_rst, RST9574_STAT);
+       p->p_fld_stat_ddr4_calib_complete =
+               nthw_register_get_field(p_curr_reg, 
RST9574_STAT_DDR4_CALIB_COMPLETE);
+       p->p_fld_stat_phy_ftile_rst_done =
+               nthw_register_get_field(p_curr_reg, 
RST9574_STAT_PHY_FTILE_RST_DONE);
+       p->p_fld_stat_phy_ftile_rdy =
+               nthw_register_get_field(p_curr_reg, RST9574_STAT_PHY_FTILE_RDY);
+       nthw_register_update(p_curr_reg);
+
+       p_curr_reg = nthw_module_get_register(p_mod_rst, RST9574_LATCH);
+       p->p_fld_latch_ddr4_calib_complete =
+               nthw_register_get_field(p_curr_reg, 
RST9574_LATCH_DDR4_CALIB_COMPLETE);
+       p->p_fld_latch_phy_ftile_rst_done =
+               nthw_register_get_field(p_curr_reg, 
RST9574_LATCH_PHY_FTILE_RST_DONE);
+       p->p_fld_latch_phy_ftile_rdy =
+               nthw_register_get_field(p_curr_reg, 
RST9574_LATCH_PHY_FTILE_RDY);
+       nthw_register_update(p_curr_reg);
+
        return 0;
 };
 
-- 
2.45.0

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