[PATCH v1 15/24] net/e1000/base: correct mPHY access logic

[Anatoly Burakov]

The original code had incorrect indentation, and the fix was applied to
follow the indentation, i.e. adding brackets making the indentation valid.
However, the actual issue was incorrect indentation and not missing braces,
so the fix was incorrect.

This fix restores the original logic and corrects indentation.

Fixes: d5e39d1ca460 ("net/e1000/base: fix build with gcc 6")
Cc: sta...@dpdk.org

Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
---
 drivers/net/intel/e1000/base/e1000_phy.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/net/intel/e1000/base/e1000_phy.c 
b/drivers/net/intel/e1000/base/e1000_phy.c
index 62d0be5080..208fb3f81b 100644
--- a/drivers/net/intel/e1000/base/e1000_phy.c
+++ b/drivers/net/intel/e1000/base/e1000_phy.c
@@ -4134,13 +4134,12 @@ s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 
address, u32 *data)
        *data = E1000_READ_REG(hw, E1000_MPHY_DATA);
 
        /* Disable access to mPHY if it was originally disabled */
-       if (locked) {
+       if (locked)
                ready = e1000_is_mphy_ready(hw);
-               if (!ready)
-                       return -E1000_ERR_PHY;
-               E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
-                               E1000_MPHY_DIS_ACCESS);
-       }
+       if (!ready)
+               return -E1000_ERR_PHY;
+       E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
+                       E1000_MPHY_DIS_ACCESS);
 
        return E1000_SUCCESS;
 }
@@ -4200,13 +4199,12 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 
address, u32 data,
        E1000_WRITE_REG(hw, E1000_MPHY_DATA, data);
 
        /* Disable access to mPHY if it was originally disabled */
-       if (locked) {
+       if (locked)
                ready = e1000_is_mphy_ready(hw);
-               if (!ready)
-                       return -E1000_ERR_PHY;
-               E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
-                               E1000_MPHY_DIS_ACCESS);
-       }
+       if (!ready)
+               return -E1000_ERR_PHY;
+       E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,
+                       E1000_MPHY_DIS_ACCESS);
 
        return E1000_SUCCESS;
 }
-- 
2.43.5