From: Aleksandr Loktionov <aleksandr.loktio...@intel.com>

In e1000_hash_mc_addr_generic() the expression:

        "mc_addr[4] >> 8 - bit_shift", right shifting "mc_addr[4]"

shift by more than 7 bits always yields zero, so hash becomes not so
different. Add initialization with bit_shift = 1, and add a loop condition
to ensure bit_shift will be always in [1..8] range.

Fixes: 8cb7c57d9b3c ("net/igc: support device initialization")
Cc: sta...@dpdk.org

Signed-off-by: Aleksandr Loktionov <aleksandr.loktio...@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.bura...@intel.com>
---
 drivers/net/intel/igc/base/igc_mac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/intel/igc/base/igc_mac.c 
b/drivers/net/intel/igc/base/igc_mac.c
index 3cd6506e5e..c69f8ac73b 100644
--- a/drivers/net/intel/igc/base/igc_mac.c
+++ b/drivers/net/intel/igc/base/igc_mac.c
@@ -486,7 +486,7 @@ static int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, 
u32 index)
 u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
 {
        u32 hash_value, hash_mask;
-       u8 bit_shift = 0;
+       u8 bit_shift = 1;
 
        DEBUGFUNC("igc_hash_mc_addr_generic");
 
@@ -496,7 +496,7 @@ u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)
        /* For a mc_filter_type of 0, bit_shift is the number of left-shifts
         * where 0xFF would still fall within the hash mask.
         */
-       while (hash_mask >> bit_shift != 0xFF)
+       while (hash_mask >> bit_shift != 0xFF && bit_shift < 4)
                bit_shift++;
 
        /* The portion of the address that is used for the hash table
-- 
2.43.5

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