On 2025/1/4 2:58, Stephen Hemminger wrote:
> On Fri, 03 Jan 2025 23:04:08 +0800
> "WanRenyong" <wa...@yunsilicon.com> wrote:
>
>> +struct xsc_hwinfo {
>> + uint8_t valid; /* 1: current phy info is valid, 0 : invalid */
>> + uint32_t pcie_no; /* pcie number , 0 or 1 */
>> + uint32_t func_id; /* pf glb func id */
>> + uint32_t pcie_host; /* host pcie number */
>> + uint32_t mac_phy_port; /* mac port */
>> + uint32_t funcid_to_logic_port_off; /* port func id offset */
>> + uint16_t lag_id;
>> + uint16_t raw_qp_id_base;
>> + uint16_t raw_rss_qp_id_base;
>> + uint16_t pf0_vf_funcid_base;
>> + uint16_t pf0_vf_funcid_top;
>> + uint16_t pf1_vf_funcid_base;
>> + uint16_t pf1_vf_funcid_top;
>> + uint16_t pcie0_pf_funcid_base;
>> + uint16_t pcie0_pf_funcid_top;
>> + uint16_t pcie1_pf_funcid_base;
>> + uint16_t pcie1_pf_funcid_top;
>> + uint16_t lag_port_start;
>> + uint16_t raw_tpe_qp_num;
>> + int send_seg_num;
>> + int recv_seg_num;
>> + uint8_t on_chip_tbl_vld;
>> + uint8_t dma_rw_tbl_vld;
>> + uint8_t pct_compress_vld;
>> + uint32_t chip_version;
>> + uint32_t hca_core_clock;
>> + uint8_t mac_bit;
>> + uint8_t esw_mode;
>> +};
> Can you rearrange elements in this structure so there are less holes?
> Or is it shared with the hardware.
OK, I will try to rearrange the elemments in the next version.
It 's not shared with hardware, it is just used to store hardward infos.
>
> Unless you need negative value as a sentinel, avoid use of int where unsigned
> could be used for
> seg_num.
Got it, will fix it in the next version.
unsigned
--
Thanks,
WanRenyong
