Re: [PATCH] test: raise fast test timeout to 60s on RISC-V

[David Marchand]

On Sat, Nov 23, 2024 at 4:00 PM Eric Long <i...@hack3r.moe> wrote:
>
> Current RISC-V hardware (e.g. HiFive Unmatched) is still way too slow
> compared to other architectures' counterparts. On the most powerful
> RISC-V CPU available (SG2042), DPDK still fails with 4 timeouts:
>
> ```
> Summary of Failures:
>
> 23/77 DPDK:fast-tests / eventdev_selftest_sw        TIMEOUT
>     10.06s   killed by signal 15 SIGTERM
> 56/77 DPDK:fast-tests / rib6_autotest               TIMEOUT
>     10.04s
> 64/77 DPDK:fast-tests / spinlock_autotest           TIMEOUT
>     10.06s   killed by signal 15 SIGTERM
> 66/77 DPDK:fast-tests / table_autotest              TIMEOUT
>     11.28s   killed by signal 15 SIGTERM
> ```
>
> On HiFive Unmatched, the longest test takes 53 seconds:
>
> ```
> 37/77 DPDK:fast-tests / lpm6_autotest               OK
>     53.29s
> ```
>
> Raising timeout to 60s on RISC-V target will help test effectiveness
> on it.

You can extend the timeout via the multiplier option (default timeout
of 10s * multiplier).
So in your case:
$ meson test -C <build> --suite fast-tests -t 6


-- 
David Marchand