Intel PMDs are capped by default to only 4096 RX/TX descriptors. This can be limiting for applications requiring a bigger buffer capabilities. The cap prevented the applications to configure more descriptors. By bufferring more packets with RX/TX descriptors, the applications can better handle the processing peaks.
Signed-off-by: Lukas Sismis <sis...@cesnet.cz> --- doc/guides/nics/ixgbe.rst | 2 +- drivers/net/cpfl/cpfl_rxtx.h | 2 +- drivers/net/e1000/e1000_ethdev.h | 2 +- drivers/net/iavf/iavf_rxtx.h | 2 +- drivers/net/ice/ice_rxtx.h | 2 +- drivers/net/idpf/idpf_rxtx.h | 2 +- drivers/net/ixgbe/ixgbe_ethdev.c | 2 +- drivers/net/ixgbe/ixgbe_rxtx.h | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst index 14573b542e..291b33d699 100644 --- a/doc/guides/nics/ixgbe.rst +++ b/doc/guides/nics/ixgbe.rst @@ -76,7 +76,7 @@ Scattered packets are not supported in this mode. If an incoming packet is greater than the maximum acceptable length of one "mbuf" data size (by default, the size is 2 KB), vPMD for RX would be disabled. -By default, IXGBE_MAX_RING_DESC is set to 4096 and RTE_PMD_IXGBE_RX_MAX_BURST is set to 32. +By default, IXGBE_MAX_RING_DESC is set to 32768 and RTE_PMD_IXGBE_RX_MAX_BURST is set to 32. Windows Prerequisites and Pre-conditions ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h index aacd087b56..4db4025771 100644 --- a/drivers/net/cpfl/cpfl_rxtx.h +++ b/drivers/net/cpfl/cpfl_rxtx.h @@ -11,7 +11,7 @@ /* In QLEN must be whole number of 32 descriptors. */ #define CPFL_ALIGN_RING_DESC 32 #define CPFL_MIN_RING_DESC 32 -#define CPFL_MAX_RING_DESC 4096 +#define CPFL_MAX_RING_DESC 32768 #define CPFL_DMA_MEM_ALIGN 4096 #define CPFL_MAX_HAIRPINQ_RX_2_TX 1 diff --git a/drivers/net/e1000/e1000_ethdev.h b/drivers/net/e1000/e1000_ethdev.h index 339ae1f4b6..e9046047f6 100644 --- a/drivers/net/e1000/e1000_ethdev.h +++ b/drivers/net/e1000/e1000_ethdev.h @@ -107,7 +107,7 @@ * (num_ring_desc * sizeof(struct e1000_rx/tx_desc)) % 128 == 0 */ #define E1000_MIN_RING_DESC 32 -#define E1000_MAX_RING_DESC 4096 +#define E1000_MAX_RING_DESC 32768 /* * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index 7b56076d32..f9c129f0ef 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -8,7 +8,7 @@ /* In QLEN must be whole number of 32 descriptors. */ #define IAVF_ALIGN_RING_DESC 32 #define IAVF_MIN_RING_DESC 64 -#define IAVF_MAX_RING_DESC 4096 +#define IAVF_MAX_RING_DESC 32768 #define IAVF_DMA_MEM_ALIGN 4096 /* Base address of the HW descriptor ring should be 128B aligned. */ #define IAVF_RING_BASE_ALIGN 128 diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index f7276cfc9f..6d18fe908d 100644 --- a/drivers/net/ice/ice_rxtx.h +++ b/drivers/net/ice/ice_rxtx.h @@ -9,7 +9,7 @@ #define ICE_ALIGN_RING_DESC 32 #define ICE_MIN_RING_DESC 64 -#define ICE_MAX_RING_DESC 4096 +#define ICE_MAX_RING_DESC 32768 #define ICE_DMA_MEM_ALIGN 4096 #define ICE_RING_BASE_ALIGN 128 diff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h index 41a7495083..0f78f7cba5 100644 --- a/drivers/net/idpf/idpf_rxtx.h +++ b/drivers/net/idpf/idpf_rxtx.h @@ -11,7 +11,7 @@ /* In QLEN must be whole number of 32 descriptors. */ #define IDPF_ALIGN_RING_DESC 32 #define IDPF_MIN_RING_DESC 32 -#define IDPF_MAX_RING_DESC 4096 +#define IDPF_MAX_RING_DESC 32768 #define IDPF_DMA_MEM_ALIGN 4096 /* Base address of the HW descriptor ring should be 128B aligned. */ #define IDPF_RING_BASE_ALIGN 128 diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 7da2ccf6a8..a2637f0a91 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -73,7 +73,7 @@ #define IXGBE_MMW_SIZE_DEFAULT 0x4 #define IXGBE_MMW_SIZE_JUMBO_FRAME 0x14 -#define IXGBE_MAX_RING_DESC 4096 /* replicate define from rxtx */ +#define IXGBE_MAX_RING_DESC 32768 /* replicate define from rxtx */ /* * Default values for RX/TX configuration diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h index ee89c89929..a28037b08a 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.h +++ b/drivers/net/ixgbe/ixgbe_rxtx.h @@ -25,7 +25,7 @@ * (num_ring_desc * sizeof(rx/tx descriptor)) % 128 == 0 */ #define IXGBE_MIN_RING_DESC 32 -#define IXGBE_MAX_RING_DESC 4096 +#define IXGBE_MAX_RING_DESC 32768 #define RTE_PMD_IXGBE_TX_MAX_BURST 32 #define RTE_PMD_IXGBE_RX_MAX_BURST 32 -- 2.34.1
