Create an array STE matcher for a template table
in case of insertion by index with pattern is selected.
Packets will be matched on a pattern at the index.
This table is isolated from any other tables in a group.
That means packets missed the rule won't go to a lower
priority tables, but proceed with the default miss instead.
Signed-off-by: Alexander Kozyrev <akozy...@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index c21eb1eaed..c236831e21 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -5157,8 +5157,15 @@ flow_hw_table_create(struct rte_eth_dev *dev,
matcher_attr.optimize_using_rule_idx = true;
matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
matcher_attr.insert_mode =
flow_hw_matcher_insert_mode_get(attr->insertion_type);
- if (matcher_attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX)
- matcher_attr.match_mode = MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT;
+ if (matcher_attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX) {
+ if (attr->insertion_type ==
RTE_FLOW_TABLE_INSERTION_TYPE_INDEX_WITH_PATTERN) {
+ matcher_attr.isolated = true;
+ matcher_attr.match_mode =
MLX5DR_MATCHER_MATCH_MODE_DEFAULT;
+ } else {
+ matcher_attr.isolated = false;
+ matcher_attr.match_mode =
MLX5DR_MATCHER_MATCH_MODE_ALWAYS_HIT;
+ }
+ }
if (attr->hash_func == RTE_FLOW_TABLE_HASH_FUNC_CRC16) {
DRV_LOG(ERR, "16-bit checksum hash type is not supported");
rte_errno = ENOTSUP;
--
2.43.5
