Hi Maxime,
There is no formal support for VRB2 yet, this is ongoing and we will formally
enable this only in DPDK 24.11.
So we don’t believe this commit below is truly a `fix` required to be applied
on stable branch.
Ie. DPDK 23.11 will not support VRB2 anyway.
Still Hernan will put the fix tag that you requested in the v3 for now, but
feel free to remove that tag if you agree this is actually not required.
Up to you, best probably best to only apply true fixes on LTS release.
Thanks
Nic
> -----Original Message-----
> From: Maxime Coquelin <maxime.coque...@redhat.com>
> Sent: Tuesday, October 8, 2024 1:00 AM
> To: Vargas, Hernan <hernan.var...@intel.com>; dev@dpdk.org;
> gak...@marvell.com; t...@redhat.com
> Cc: Chautru, Nicolas <nicolas.chau...@intel.com>; Zhang, Qi Z
> <qi.z.zh...@intel.com>
> Subject: Re: [PATCH v2 06/10] baseband/acc: remove soft output bypass
>
>
>
> On 10/3/24 22:49, Hernan Vargas wrote:
> > Removing soft output bypass capability due to device limitations.
>
> It should be specified this is for VRB2 device variant.
>
> And this should be backported, so pass Fixes tag and cc stable as it was
> introduced in v23.11 LTS.
>
> Fixes: b49fe052f9cd ("baseband/acc: add FEC capabilities for VRB2 variant")
> Cc: sta...@dpdk.org
>
> Thanks,
> Maxime
>
> >
> > Signed-off-by: Hernan Vargas <hernan.var...@intel.com>
> > ---
> > drivers/baseband/acc/rte_vrb_pmd.c | 7 +++----
> > 1 file changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/baseband/acc/rte_vrb_pmd.c
> > b/drivers/baseband/acc/rte_vrb_pmd.c
> > index 26335d55ba3b..88201d11de88 100644
> > --- a/drivers/baseband/acc/rte_vrb_pmd.c
> > +++ b/drivers/baseband/acc/rte_vrb_pmd.c
> > @@ -1359,7 +1359,6 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct
> rte_bbdev_driver_info *dev_info)
> >
> RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION |
> > RTE_BBDEV_LDPC_LLR_COMPRESSION |
> > RTE_BBDEV_LDPC_SOFT_OUT_ENABLE |
> > - RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS |
> >
> RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS |
> > RTE_BBDEV_LDPC_DEC_INTERRUPTS,
> > .llr_size = 8,
> > @@ -1736,18 +1735,18 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op,
> struct acc_fcw_ld *fcw,
> > fcw->so_en = check_bit(op->ldpc_dec.op_flags,
> RTE_BBDEV_LDPC_SOFT_OUT_ENABLE);
> > fcw->so_bypass_intlv = check_bit(op->ldpc_dec.op_flags,
> >
> RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS);
> > - fcw->so_bypass_rm = check_bit(op->ldpc_dec.op_flags,
> > - RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS);
> > + fcw->so_bypass_rm = 0;
> > fcw->minsum_offset = 1;
> > fcw->dec_llrclip = 2;
> > }
> >
> > /*
> > - * These are all implicitly set
> > + * These are all implicitly set:
> > * fcw->synd_post = 0;
> > * fcw->dec_convllr = 0;
> > * fcw->hcout_convllr = 0;
> > * fcw->hcout_size1 = 0;
> > + * fcw->so_it = 0;
> > * fcw->hcout_offset = 0;
> > * fcw->negstop_th = 0;
> > * fcw->negstop_it = 0;
