On 10/4/2024 2:05 AM, Joshua Washington wrote:
> Without memory barriers, there is no guarantee that the CPU will
> actually wait until after the descriptor has been fully written before
> loading descriptor data. In this case, it is possible that stale data is
> read and acted on by the driver when processing TX or RX completions.
>
> This change adds read memory barriers just after the generation bit is
> read in both the RX and the TX path to ensure that the NIC has properly
> passed ownership to the driver before descriptor data is read in full.
>
> Note that memory barriers should not be needed after writing the RX
> buffer queue/TX descriptor queue tails because rte_write32 includes an
> implicit write memory barrier.
>
> Fixes: 4022f9999f56 ("net/gve: support basic Tx data path for DQO")
> Fixes: 45da16b5b181 ("net/gve: support basic Rx data path for DQO")
> Cc: junfeng....@intel.com
> Cc: sta...@dpdk.org
>
> Signed-off-by: Joshua Washington <joshw...@google.com>
> Reviewed-by: Praveen Kaligineedi <pkaligine...@google.com>
> Reviewed-by: Rushil Gupta <rush...@google.com>
>
Applied to dpdk-next-net/main, thanks.
