From: Milena Olech <milena.ol...@intel.com>
More universal method for getting pca9575 handle is introduced. The first step
is to look for CLK_MUX handle. Having that it is possible to find CLK_MUX GPIO
pin. Provided data let check what is driving the pin - the expectation is that
pca9575 node part number is returned.
Signed-off-by: Milena Olech <milena.ol...@intel.com>
Signed-off-by: Ian Stokes <ian.sto...@intel.com>
---
drivers/net/ice/base/ice_ptp_hw.c | 46 +++++++++++++++++++++++++++----
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c
b/drivers/net/ice/base/ice_ptp_hw.c
index 610512a8a9..b40daf9634 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -5122,10 +5122,11 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8
port, u64 *tstamp_ready)
static int
ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
{
+ u8 node_part_number, idx, node_type_ctx_clk_mux, node_part_num_clk_mux;
+ struct ice_aqc_get_link_topo_pin cmd_pin;
+ u16 node_handle, clock_mux_handle;
struct ice_aqc_get_link_topo cmd;
- u8 node_part_number, idx;
int status;
- u16 node_handle;
if (!hw || !pca9575_handle)
return ICE_ERR_PARAM;
@@ -5137,11 +5138,46 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16
*pca9575_handle)
}
memset(&cmd, 0, sizeof(cmd));
+ memset(&cmd_pin, 0, sizeof(cmd_pin));
- /* Set node type to GPIO controller */
+ node_type_ctx_clk_mux = (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ node_type_ctx_clk_mux |= (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+ node_part_num_clk_mux = ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX;
+
+ /* Look for CLOCK MUX handle in the netlist */
+ status = ice_find_netlist_node(hw, node_type_ctx_clk_mux,
+ node_part_num_clk_mux,
+ &clock_mux_handle);
+ if (status)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ /* Take CLOCK MUX GPIO pin */
+ cmd_pin.input_io_params = (ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_GPIO <<
+ ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S);
+ cmd_pin.input_io_params |= (ICE_AQC_LINK_TOPO_IO_FUNC_CLK_IN <<
+ ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_S);
+ cmd_pin.addr.handle = CPU_TO_LE16(clock_mux_handle);
+ cmd_pin.addr.topo_params.node_type_ctx =
+ (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ cmd_pin.addr.topo_params.node_type_ctx |=
+ (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+
+ status = ice_aq_get_netlist_node_pin(hw, &cmd_pin, &node_handle);
+ if (status)
+ return ICE_ERR_NOT_SUPPORTED;
+
+ /* Check what is driving the pin */
cmd.addr.topo_params.node_type_ctx =
- (ICE_AQC_LINK_TOPO_NODE_TYPE_M &
- ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL);
+ (ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL <<
+ ICE_AQC_LINK_TOPO_NODE_TYPE_S);
+ cmd.addr.topo_params.node_type_ctx |=
+ (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL <<
+ ICE_AQC_LINK_TOPO_NODE_CTX_S);
+ cmd.addr.handle = CPU_TO_LE16(node_handle);
#define SW_PCA9575_SFP_TOPO_IDX 2
#define SW_PCA9575_QSFP_TOPO_IDX 1
--
2.43.0
