PLL control setting(RRC) is needed only in fixed PHY configuration to fix the peer-peer issues. Without the PLL control setting, the link up takes longer time in a fixed phy configuration.
Driver implements SW RRC for Autoneg On configuration, hence PLL control setting (RRC) is not needed for AN On configuration, and can be skipped. Also, PLL re-initialization is not needed for PHY Power Off and RRC commands. Otherwise, they lead to mailbox errors. Added the changes accordingly. Signed-off-by: Venkat Kumar Ande <venkatkumar.a...@amd.com> --- drivers/net/axgbe/axgbe_phy_impl.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c index 8cc99d3a6b..ceff36df3d 100644 --- a/drivers/net/axgbe/axgbe_phy_impl.c +++ b/drivers/net/axgbe/axgbe_phy_impl.c @@ -1207,6 +1207,10 @@ static void axgbe_phy_rx_reset(struct axgbe_port *pdata) static void axgbe_phy_pll_ctrl(struct axgbe_port *pdata, bool enable) { + /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ + if (pdata->phy.autoneg != AUTONEG_DISABLE) + return; + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, XGBE_PMA_PLL_CTRL_MASK, enable ? XGBE_PMA_PLL_CTRL_SET @@ -1251,8 +1255,10 @@ static void axgbe_phy_perform_ratechange(struct axgbe_port *pdata, axgbe_phy_rx_reset(pdata); reenable_pll: - /* Re-enable the PLL control */ - axgbe_phy_pll_ctrl(pdata, true); + /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */ + if (cmd != AXGBE_MB_CMD_POWER_OFF && + cmd != AXGBE_MB_CMD_RRC) + axgbe_phy_pll_ctrl(pdata, true); PMD_DRV_LOG(NOTICE, "firmware mailbox command did not complete\n"); } -- 2.34.1