On 2/6/24 16:30, Maxime Coquelin wrote:


On 1/23/24 17:54, Hernan Vargas wrote:
Add support for new FPGA variant AGX100 (on Arrow Creek N6000).

Signed-off-by: Hernan Vargas <hernan.var...@intel.com>
---
  doc/guides/bbdevs/fpga_5gnr_fec.rst           |   69 +-
  drivers/baseband/fpga_5gnr_fec/agx100_pmd.h   |  273 ++++
  .../baseband/fpga_5gnr_fec/fpga_5gnr_fec.h    |   12 +-
  .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c         | 1230 +++++++++++++++--
  drivers/baseband/fpga_5gnr_fec/vc_5gnr_pmd.h  |    1 -
  5 files changed, 1458 insertions(+), 127 deletions(-)
  create mode 100644 drivers/baseband/fpga_5gnr_fec/agx100_pmd.h


...

+#endif /* _AGX100_H_ */
diff --git a/drivers/baseband/fpga_5gnr_fec/fpga_5gnr_fec.h b/drivers/baseband/fpga_5gnr_fec/fpga_5gnr_fec.h
index 982e956dc819..224684902569 100644
--- a/drivers/baseband/fpga_5gnr_fec/fpga_5gnr_fec.h
+++ b/drivers/baseband/fpga_5gnr_fec/fpga_5gnr_fec.h
@@ -8,6 +8,7 @@
  #include <stdint.h>
  #include <stdbool.h>
+#include "agx100_pmd.h"
  #include "vc_5gnr_pmd.h"
  /* Helper macro for logging */
@@ -131,12 +132,21 @@ struct fpga_5gnr_fec_device {
      uint64_t q_assigned_bit_map;
      /** True if this is a PF FPGA 5GNR device. */
      bool pf_device;
+    /** Maximum number of possible queues for this device. */
+    uint8_t total_num_queues;

You missed below comment on v4 review:
"
Introduction of total_num_queues should be in a dedicated patch as a
preliminary rework.
"

While at it, please look at the checkpatch too:

WARNING:TYPO_SPELLING: 'worload' may be misspelled - perhaps 'workload'?
#306: FILE: drivers/baseband/fpga_5gnr_fec/agx100_pmd.h:98:
+       uint32_t ea:21, /**< Value of E when worload is CB. */

WARNING:TYPO_SPELLING: 'worload' may be misspelled - perhaps 'workload'?
#405: FILE: drivers/baseband/fpga_5gnr_fec/agx100_pmd.h:197:
+       uint32_t ea:21, /**< Value of E when worload is CB. */

total: 0 errors, 2 warnings, 2030 lines checked
Warning in drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c:
Using rte_smp_[r/w]mb

+    /** FPGA Variant. VC_5GNR_FPGA_VARIANT = 0; AGX100_FPGA_VARIANT = 1. */
+    uint8_t fpga_variant;
  };


Reply via email to