Add HW steering support for IPv6 traffic class field modification.
Copy from inner IPv6 traffic class field is also supported using
"level=2".
Signed-off-by: Michael Baum <michae...@nvidia.com>
---
doc/guides/rel_notes/release_24_03.rst | 1 +
drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++++++
drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/doc/guides/rel_notes/release_24_03.rst
b/doc/guides/rel_notes/release_24_03.rst
index 10268b7879..272bc9d056 100644
--- a/doc/guides/rel_notes/release_24_03.rst
+++ b/doc/guides/rel_notes/release_24_03.rst
@@ -100,6 +100,7 @@ New Features
* Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SPI`` flow
action.
* Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SEQ_NUM``
flow action.
* Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_PROTO``
flow action.
+ * Added HW steering support for modify field
``RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS`` flow action.
Removed Items
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 8454d00d4f..90ef21d75b 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1394,6 +1394,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev,
return 32;
case RTE_FLOW_FIELD_IPV6_DSCP:
return 6;
+ case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
case RTE_FLOW_FIELD_IPV6_PROTO:
return 8;
@@ -1795,6 +1796,16 @@ mlx5_flow_field_id_to_modify_info
else
info[idx].offset = off_be;
break;
+ case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
+ MLX5_ASSERT(data->offset + width <= 8);
+ off_be = 8 - (data->offset + width);
+ modi_id = CALC_MODI_ID(IPV6_TRAFFIC_CLASS, data->level);
+ info[idx] = (struct field_modify_info){1, 0, modi_id};
+ if (mask)
+ mask[idx] = flow_modify_info_mask_8(width, off_be);
+ else
+ info[idx].offset = off_be;
+ break;
case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:
MLX5_ASSERT(data->offset + width <= 16);
off_be = 16 - (data->offset + width);
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index fc0f9dabb3..90e3cf2555 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2871,7 +2871,7 @@ flow_hw_modify_field_construct(struct mlx5_hw_q_job *job,
* bits left. Shift the data left for IPV6 DSCP
*/
if (field->id == MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS &&
- !(mask & MLX5_IPV6_HDR_ECN_MASK))
+ mhdr_action->dst.field == RTE_FLOW_FIELD_IPV6_DSCP)
data <<= MLX5_IPV6_HDR_DSCP_SHIFT;
data = (data & mask) >> off_b;
job->mhdr_cmd[i++].data1 = rte_cpu_to_be_32(data);
@@ -5058,6 +5058,7 @@ flow_hw_validate_modify_field_level(const struct
rte_flow_action_modify_data *da
case RTE_FLOW_FIELD_IPV4_TTL:
case RTE_FLOW_FIELD_IPV4_SRC:
case RTE_FLOW_FIELD_IPV4_DST:
+ case RTE_FLOW_FIELD_IPV6_TRAFFIC_CLASS:
case RTE_FLOW_FIELD_IPV6_PAYLOAD_LEN:
case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
case RTE_FLOW_FIELD_IPV6_SRC:
--
2.25.1
